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authorSascha Hauer <s.hauer@pengutronix.de>2020-11-09 12:38:26 +0100
committerSascha Hauer <s.hauer@pengutronix.de>2020-11-09 13:42:10 +0100
commit119c632f12509eab4bc58daf629c4b16fffcedca (patch)
tree34366b3095d957178b46be47f628a3926ad35ac3 /dts/Bindings/arm/coresight-cti.yaml
parent89b766c63f94b5fe94db75a6f197c9e6c0f9da7e (diff)
downloadbarebox-119c632f12509eab4bc58daf629c4b16fffcedca.tar.gz
barebox-119c632f12509eab4bc58daf629c4b16fffcedca.tar.xz
dts: update to v5.10-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings/arm/coresight-cti.yaml')
-rw-r--r--dts/Bindings/arm/coresight-cti.yaml2
1 files changed, 2 insertions, 0 deletions
diff --git a/dts/Bindings/arm/coresight-cti.yaml b/dts/Bindings/arm/coresight-cti.yaml
index e42ff69d8b..21e3515491 100644
--- a/dts/Bindings/arm/coresight-cti.yaml
+++ b/dts/Bindings/arm/coresight-cti.yaml
@@ -220,6 +220,8 @@ then:
required:
- cpu
+unevaluatedProperties: false
+
examples:
# minimum CTI definition. DEVID register used to set number of triggers.
- |