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| author | Sascha Hauer <s.hauer@pengutronix.de> | 2020-04-20 15:07:38 +0200 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2020-04-27 21:17:17 +0200 |
| commit | 8d158e1a40917e48cb68131a6cfd1b8755a4d8a0 (patch) | |
| tree | 76118ca8fbf736bbdbc30b9fa2480a0d2a775597 /dts/Bindings/arm/coresight.txt | |
| parent | 15d46bac2280def447c7fd74686d44d938c24556 (diff) | |
| download | barebox-8d158e1a40917e48cb68131a6cfd1b8755a4d8a0.tar.gz barebox-8d158e1a40917e48cb68131a6cfd1b8755a4d8a0.tar.xz | |
dts: update to v5.7-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings/arm/coresight.txt')
| -rw-r--r-- | dts/Bindings/arm/coresight.txt | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/dts/Bindings/arm/coresight.txt b/dts/Bindings/arm/coresight.txt index d02c42d21f..846f6daae7 100644 --- a/dts/Bindings/arm/coresight.txt +++ b/dts/Bindings/arm/coresight.txt @@ -45,6 +45,10 @@ its hardware characteristcs. - Coresight Address Translation Unit (CATU) "arm,coresight-catu", "arm,primecell"; + - Coresight Cross Trigger Interface (CTI): + "arm,coresight-cti", "arm,primecell"; + See coresight-cti.yaml for full CTI definitions. + * reg: physical base address and length of the register set(s) of the component. @@ -72,6 +76,9 @@ its hardware characteristcs. * reg-names: the only acceptable values are "stm-base" and "stm-stimulus-base", each corresponding to the areas defined in "reg". +* Required properties for Coresight Cross Trigger Interface (CTI) + See coresight-cti.yaml for full CTI definitions. + * Required properties for devices that don't show up on the AMBA bus, such as non-configurable replicators and non-configurable funnels: |