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author | Sascha Hauer <s.hauer@pengutronix.de> | 2018-05-08 08:14:56 +0200 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2018-05-08 08:14:56 +0200 |
commit | 6b85c20d46812bdbc062b863261c3e5100e30556 (patch) | |
tree | e067c9889eaf55d5e793b05a14000276f2669e9f /dts/Bindings/arm/cpu-enable-method | |
parent | 9d8c00bdf7c1e8b614a797f0a15fa45bf6387224 (diff) | |
download | barebox-6b85c20d46812bdbc062b863261c3e5100e30556.tar.gz barebox-6b85c20d46812bdbc062b863261c3e5100e30556.tar.xz |
dts: update to v4.17-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings/arm/cpu-enable-method')
-rw-r--r-- | dts/Bindings/arm/cpu-enable-method/nuvoton,npcm750-smp | 42 |
1 files changed, 42 insertions, 0 deletions
diff --git a/dts/Bindings/arm/cpu-enable-method/nuvoton,npcm750-smp b/dts/Bindings/arm/cpu-enable-method/nuvoton,npcm750-smp new file mode 100644 index 0000000000..8e043301e2 --- /dev/null +++ b/dts/Bindings/arm/cpu-enable-method/nuvoton,npcm750-smp @@ -0,0 +1,42 @@ +========================================================= +Secondary CPU enable-method "nuvoton,npcm750-smp" binding +========================================================= + +To apply to all CPUs, a single "nuvoton,npcm750-smp" enable method should be +defined in the "cpus" node. + +Enable method name: "nuvoton,npcm750-smp" +Compatible machines: "nuvoton,npcm750" +Compatible CPUs: "arm,cortex-a9" +Related properties: (none) + +Note: +This enable method needs valid nodes compatible with "arm,cortex-a9-scu" and +"nuvoton,npcm750-gcr". + +Example: + + cpus { + #address-cells = <1>; + #size-cells = <0>; + enable-method = "nuvoton,npcm750-smp"; + + cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a9"; + clocks = <&clk NPCM7XX_CLK_CPU>; + clock-names = "clk_cpu"; + reg = <0>; + next-level-cache = <&L2>; + }; + + cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a9"; + clocks = <&clk NPCM7XX_CLK_CPU>; + clock-names = "clk_cpu"; + reg = <1>; + next-level-cache = <&L2>; + }; + }; + |