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author | Sascha Hauer <s.hauer@pengutronix.de> | 2015-05-06 08:56:43 +0200 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2015-05-06 08:56:43 +0200 |
commit | 461f8cfc7ea788428240271818363333ceff5c4c (patch) | |
tree | a3d6e3737c203ea29f8db2a6ddaadc326247376c /dts/Bindings/arm/exynos/power_domain.txt | |
parent | 6345d37ae50c3ac8dd0e6176bc846fe211cbddd4 (diff) | |
download | barebox-461f8cfc7ea788428240271818363333ceff5c4c.tar.gz barebox-461f8cfc7ea788428240271818363333ceff5c4c.tar.xz |
dts: update to v4.1-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings/arm/exynos/power_domain.txt')
-rw-r--r-- | dts/Bindings/arm/exynos/power_domain.txt | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/dts/Bindings/arm/exynos/power_domain.txt b/dts/Bindings/arm/exynos/power_domain.txt index 1e09703734..5da38c5ed4 100644 --- a/dts/Bindings/arm/exynos/power_domain.txt +++ b/dts/Bindings/arm/exynos/power_domain.txt @@ -22,6 +22,9 @@ Optional Properties: - pclkN, clkN: Pairs of parent of input clock and input clock to the devices in this power domain. Maximum of 4 pairs (N = 0 to 3) are supported currently. + - asbN: Clocks required by asynchronous bridges (ASB) present in + the power domain. These clock should be enabled during power + domain on/off operations. - power-domains: phandle pointing to the parent power domain, for more details see Documentation/devicetree/bindings/power/power_domain.txt |