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| author | Sascha Hauer <s.hauer@pengutronix.de> | 2014-10-21 13:11:04 +0200 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2014-10-21 13:11:04 +0200 |
| commit | 604ad71929a1deabe77b7ab9c3655d82002d79c9 (patch) | |
| tree | 8640b00b7d9945560f3b31dd3efd947f08d0d319 /dts/Bindings/arm/exynos/power_domain.txt | |
| parent | 826d399c448b4e08d73731448d0400c449e9fc58 (diff) | |
| download | barebox-604ad71929a1deabe77b7ab9c3655d82002d79c9.tar.gz barebox-604ad71929a1deabe77b7ab9c3655d82002d79c9.tar.xz | |
dts: update to v3.18-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings/arm/exynos/power_domain.txt')
| -rw-r--r-- | dts/Bindings/arm/exynos/power_domain.txt | 13 |
1 files changed, 6 insertions, 7 deletions
diff --git a/dts/Bindings/arm/exynos/power_domain.txt b/dts/Bindings/arm/exynos/power_domain.txt index 8b4f7b7fe8..abde1ea8a1 100644 --- a/dts/Bindings/arm/exynos/power_domain.txt +++ b/dts/Bindings/arm/exynos/power_domain.txt @@ -8,6 +8,8 @@ Required Properties: * samsung,exynos4210-pd - for exynos4210 type power domain. - reg: physical base address of the controller and length of memory mapped region. +- #power-domain-cells: number of cells in power domain specifier; + must be 0. Optional Properties: - clocks: List of clock handles. The parent clocks of the input clocks to the @@ -29,6 +31,7 @@ Example: lcd0: power-domain-lcd0 { compatible = "samsung,exynos4210-pd"; reg = <0x10023C00 0x10>; + #power-domain-cells = <0>; }; mfc_pd: power-domain@10044060 { @@ -37,12 +40,8 @@ Example: clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MOUT_SW_ACLK333>, <&clock CLK_MOUT_USER_ACLK333>; clock-names = "oscclk", "pclk0", "clk0"; + #power-domain-cells = <0>; }; -Example of the node using power domain: - - node { - /* ... */ - samsung,power-domain = <&lcd0>; - /* ... */ - }; +See Documentation/devicetree/bindings/power/power_domain.txt for description +of consumer-side bindings. |