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authorSascha Hauer <s.hauer@pengutronix.de>2018-09-11 08:26:30 +0200
committerSascha Hauer <s.hauer@pengutronix.de>2018-09-11 17:23:13 +0200
commit35f607bc7da71b302fd6bf3d6d48d7ea66df1195 (patch)
treedd2cf14c56430d21079c794fa6e03d7f5d91070e /dts/Bindings/arm/freescale/fsl,vf610-mscm-ir.txt
parent625eea2765d94aee016cf25d9cabecde8eae0775 (diff)
downloadbarebox-35f607bc7da71b302fd6bf3d6d48d7ea66df1195.tar.gz
dts: update to v4.19-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings/arm/freescale/fsl,vf610-mscm-ir.txt')
-rw-r--r--dts/Bindings/arm/freescale/fsl,vf610-mscm-ir.txt3
1 files changed, 0 insertions, 3 deletions
diff --git a/dts/Bindings/arm/freescale/fsl,vf610-mscm-ir.txt b/dts/Bindings/arm/freescale/fsl,vf610-mscm-ir.txt
index 669808b..6dd6f39 100644
--- a/dts/Bindings/arm/freescale/fsl,vf610-mscm-ir.txt
+++ b/dts/Bindings/arm/freescale/fsl,vf610-mscm-ir.txt
@@ -18,9 +18,6 @@ Required properties:
assignment of the interrupt router is required.
Flags get passed only when using GIC as parent. Flags
encoding as documented by the GIC bindings.
-- interrupt-parent: Should be the phandle for the interrupt controller of
- the CPU the device tree is intended to be used on. This
- is either the node of the GIC or NVIC controller.
Example:
mscm_ir: interrupt-controller@40001800 {