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| author | Sascha Hauer <s.hauer@pengutronix.de> | 2022-03-08 10:00:45 +0100 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2022-03-08 10:00:45 +0100 |
| commit | 02a90eb8f0a8a81f386d380f1d7fdbdb0d0cc3b4 (patch) | |
| tree | a8a24a437d9672d644e30dc0cd52af97c891465a /dts/Bindings/arm/freescale | |
| parent | e355f3fac3382069e5052d3d50a66d89ebee2863 (diff) | |
| download | barebox-02a90eb8f0a8a81f386d380f1d7fdbdb0d0cc3b4.tar.gz barebox-02a90eb8f0a8a81f386d380f1d7fdbdb0d0cc3b4.tar.xz | |
dts: update to v5.17-rc7
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings/arm/freescale')
| -rw-r--r-- | dts/Bindings/arm/freescale/fsl,layerscape-dcfg.txt | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/dts/Bindings/arm/freescale/fsl,layerscape-dcfg.txt b/dts/Bindings/arm/freescale/fsl,layerscape-dcfg.txt index b5cb374dc4..10a91cc8b9 100644 --- a/dts/Bindings/arm/freescale/fsl,layerscape-dcfg.txt +++ b/dts/Bindings/arm/freescale/fsl,layerscape-dcfg.txt @@ -8,7 +8,7 @@ Required properties: - compatible: Should contain a chip-specific compatible string, Chip-specific strings are of the form "fsl,<chip>-dcfg", The following <chip>s are known to be supported: - ls1012a, ls1021a, ls1043a, ls1046a, ls2080a. + ls1012a, ls1021a, ls1043a, ls1046a, ls2080a, lx2160a - reg : should contain base address and length of DCFG memory-mapped registers |