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| author | Sascha Hauer <s.hauer@pengutronix.de> | 2014-09-01 09:47:17 +0200 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2014-09-02 11:01:29 +0200 |
| commit | a595ff6eea05b919567f96d71e7e2c7b6236b8ac (patch) | |
| tree | 2d7cea529b6a06be744116e29e8a97b0c8de1981 /dts/Bindings/arm/marvell,berlin.txt | |
| parent | 7955f4315187665690f51e20698d4c12c68e008f (diff) | |
| download | barebox-a595ff6eea05b919567f96d71e7e2c7b6236b8ac.tar.gz barebox-a595ff6eea05b919567f96d71e7e2c7b6236b8ac.tar.xz | |
dts: update to v3.17-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings/arm/marvell,berlin.txt')
| -rw-r--r-- | dts/Bindings/arm/marvell,berlin.txt | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/dts/Bindings/arm/marvell,berlin.txt b/dts/Bindings/arm/marvell,berlin.txt index 94013a9a87..904de5781f 100644 --- a/dts/Bindings/arm/marvell,berlin.txt +++ b/dts/Bindings/arm/marvell,berlin.txt @@ -24,6 +24,22 @@ SoC and board used. Currently known SoC compatibles are: ... } +* Marvell Berlin CPU control bindings + +CPU control register allows various operations on CPUs, like resetting them +independently. + +Required properties: +- compatible: should be "marvell,berlin-cpu-ctrl" +- reg: address and length of the register set + +Example: + +cpu-ctrl@f7dd0000 { + compatible = "marvell,berlin-cpu-ctrl"; + reg = <0xf7dd0000 0x10000>; +}; + * Marvell Berlin2 chip control binding Marvell Berlin SoCs have a chip control register set providing several |