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authorSascha Hauer <s.hauer@pengutronix.de>2019-01-14 09:09:57 +0100
committerSascha Hauer <s.hauer@pengutronix.de>2019-01-14 09:09:57 +0100
commit33fdc89d4cbd74aa54c28dc61d62972ab164e64d (patch)
treeda5ceff551dc1fdf2f2cc40e97a08035f9ef84fb /dts/Bindings/arm/marvell
parent13a52906ce67ed2ce67bfc10714934ffa6c5d646 (diff)
downloadbarebox-33fdc89d4cbd74aa54c28dc61d62972ab164e64d.tar.gz
barebox-33fdc89d4cbd74aa54c28dc61d62972ab164e64d.tar.xz
dts: update to v5.0-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings/arm/marvell')
-rw-r--r--dts/Bindings/arm/marvell/ap806-system-controller.txt7
-rw-r--r--dts/Bindings/arm/marvell/cp110-system-controller.txt9
2 files changed, 16 insertions, 0 deletions
diff --git a/dts/Bindings/arm/marvell/ap806-system-controller.txt b/dts/Bindings/arm/marvell/ap806-system-controller.txt
index 3fd21bb7cb..7b8b8eb019 100644
--- a/dts/Bindings/arm/marvell/ap806-system-controller.txt
+++ b/dts/Bindings/arm/marvell/ap806-system-controller.txt
@@ -114,12 +114,17 @@ Documentation/devicetree/bindings/thermal/thermal.txt
The thermal IP can probe the temperature all around the processor. It
may feature several channels, each of them wired to one sensor.
+It is possible to setup an overheat interrupt by giving at least one
+critical point to any subnode of the thermal-zone node.
+
Required properties:
- compatible: must be one of:
* marvell,armada-ap806-thermal
- reg: register range associated with the thermal functions.
Optional properties:
+- interrupts: overheat interrupt handle. Should point to line 18 of the
+ SEI irqchip. See interrupt-controller/interrupts.txt
- #thermal-sensor-cells: shall be <1> when thermal-zones subnodes refer
to this IP and represents the channel ID. There is one sensor per
channel. O refers to the thermal IP internal channel, while positive
@@ -133,6 +138,8 @@ ap_syscon1: system-controller@6f8000 {
ap_thermal: thermal-sensor@80 {
compatible = "marvell,armada-ap806-thermal";
reg = <0x80 0x10>;
+ interrupt-parent = <&sei>;
+ interrupts = <18>;
#thermal-sensor-cells = <1>;
};
};
diff --git a/dts/Bindings/arm/marvell/cp110-system-controller.txt b/dts/Bindings/arm/marvell/cp110-system-controller.txt
index 81ce742d27..4db4119a6d 100644
--- a/dts/Bindings/arm/marvell/cp110-system-controller.txt
+++ b/dts/Bindings/arm/marvell/cp110-system-controller.txt
@@ -199,6 +199,9 @@ Thermal:
The thermal IP can probe the temperature all around the processor. It
may feature several channels, each of them wired to one sensor.
+It is possible to setup an overheat interrupt by giving at least one
+critical point to any subnode of the thermal-zone node.
+
For common binding part and usage, refer to
Documentation/devicetree/bindings/thermal/thermal.txt
@@ -208,6 +211,11 @@ Required properties:
- reg: register range associated with the thermal functions.
Optional properties:
+- interrupts-extended: overheat interrupt handle. Should point to
+ a line of the ICU-SEI irqchip (116 is what is usually used by the
+ firmware). The ICU-SEI will redirect towards interrupt line #37 of the
+ AP SEI which is shared across all CPs.
+ See interrupt-controller/interrupts.txt
- #thermal-sensor-cells: shall be <1> when thermal-zones subnodes refer
to this IP and represents the channel ID. There is one sensor per
channel. O refers to the thermal IP internal channel.
@@ -220,6 +228,7 @@ CP110_LABEL(syscon1): system-controller@6f8000 {
CP110_LABEL(thermal): thermal-sensor@70 {
compatible = "marvell,armada-cp110-thermal";
reg = <0x70 0x10>;
+ interrupts-extended = <&CP110_LABEL(icu_sei) 116 IRQ_TYPE_LEVEL_HIGH>;
#thermal-sensor-cells = <1>;
};
};