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authorSascha Hauer <s.hauer@pengutronix.de>2016-06-13 07:29:57 +0200
committerSascha Hauer <s.hauer@pengutronix.de>2016-06-13 07:29:57 +0200
commita4f4bc65b33164eb8c19bcff9834cc87bcc845bb (patch)
treeef97762be5b614f160e9affddd1bbbec43c007dc /dts/Bindings/arm/marvell
parent83e61900b02965d01f0885e2db2077df35be7f56 (diff)
downloadbarebox-a4f4bc65b33164eb8c19bcff9834cc87bcc845bb.tar.gz
barebox-a4f4bc65b33164eb8c19bcff9834cc87bcc845bb.tar.xz
dts: update to v4.6-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings/arm/marvell')
-rw-r--r--dts/Bindings/arm/marvell/armada-370-xp-pmsu.txt21
-rw-r--r--dts/Bindings/arm/marvell/armada-370-xp.txt24
-rw-r--r--dts/Bindings/arm/marvell/armada-375.txt9
-rw-r--r--dts/Bindings/arm/marvell/armada-37xx.txt16
-rw-r--r--dts/Bindings/arm/marvell/armada-380-mpcore-soc-ctrl.txt14
-rw-r--r--dts/Bindings/arm/marvell/armada-38x.txt27
-rw-r--r--dts/Bindings/arm/marvell/armada-39x.txt20
-rw-r--r--dts/Bindings/arm/marvell/armada-7k-8k.txt24
-rw-r--r--dts/Bindings/arm/marvell/armada-cpu-reset.txt14
-rw-r--r--dts/Bindings/arm/marvell/coherency-fabric.txt48
-rw-r--r--dts/Bindings/arm/marvell/kirkwood.txt27
-rw-r--r--dts/Bindings/arm/marvell/marvell,berlin.txt96
-rw-r--r--dts/Bindings/arm/marvell/marvell,dove.txt22
-rw-r--r--dts/Bindings/arm/marvell/marvell,kirkwood.txt105
-rw-r--r--dts/Bindings/arm/marvell/mvebu-cpu-config.txt20
-rw-r--r--dts/Bindings/arm/marvell/mvebu-system-controller.txt18
16 files changed, 505 insertions, 0 deletions
diff --git a/dts/Bindings/arm/marvell/armada-370-xp-pmsu.txt b/dts/Bindings/arm/marvell/armada-370-xp-pmsu.txt
new file mode 100644
index 0000000000..26799ef562
--- /dev/null
+++ b/dts/Bindings/arm/marvell/armada-370-xp-pmsu.txt
@@ -0,0 +1,21 @@
+Power Management Service Unit(PMSU)
+-----------------------------------
+Available on Marvell SOCs: Armada 370, Armada 38x and Armada XP
+
+Required properties:
+
+- compatible: should be one of:
+ - "marvell,armada-370-pmsu" for Armada 370 or Armada XP
+ - "marvell,armada-380-pmsu" for Armada 38x
+ - "marvell,armada-370-xp-pmsu" was used for Armada 370/XP but is now
+ deprecated and will be removed
+
+- reg: Should contain PMSU registers location and length.
+
+Example:
+
+armada-370-xp-pmsu@22000 {
+ compatible = "marvell,armada-370-pmsu";
+ reg = <0x22000 0x1000>;
+};
+
diff --git a/dts/Bindings/arm/marvell/armada-370-xp.txt b/dts/Bindings/arm/marvell/armada-370-xp.txt
new file mode 100644
index 0000000000..c6ed90ea6e
--- /dev/null
+++ b/dts/Bindings/arm/marvell/armada-370-xp.txt
@@ -0,0 +1,24 @@
+Marvell Armada 370 and Armada XP Platforms Device Tree Bindings
+---------------------------------------------------------------
+
+Boards with a SoC of the Marvell Armada 370 and Armada XP families
+shall have the following property:
+
+Required root node property:
+
+compatible: must contain "marvell,armada-370-xp"
+
+In addition, boards using the Marvell Armada 370 SoC shall have the
+following property:
+
+Required root node property:
+
+compatible: must contain "marvell,armada370"
+
+In addition, boards using the Marvell Armada XP SoC shall have the
+following property:
+
+Required root node property:
+
+compatible: must contain "marvell,armadaxp"
+
diff --git a/dts/Bindings/arm/marvell/armada-375.txt b/dts/Bindings/arm/marvell/armada-375.txt
new file mode 100644
index 0000000000..867d0b80cb
--- /dev/null
+++ b/dts/Bindings/arm/marvell/armada-375.txt
@@ -0,0 +1,9 @@
+Marvell Armada 375 Platforms Device Tree Bindings
+-------------------------------------------------
+
+Boards with a SoC of the Marvell Armada 375 family shall have the
+following property:
+
+Required root node property:
+
+compatible: must contain "marvell,armada375"
diff --git a/dts/Bindings/arm/marvell/armada-37xx.txt b/dts/Bindings/arm/marvell/armada-37xx.txt
new file mode 100644
index 0000000000..51336e5fc7
--- /dev/null
+++ b/dts/Bindings/arm/marvell/armada-37xx.txt
@@ -0,0 +1,16 @@
+Marvell Armada 37xx Platforms Device Tree Bindings
+--------------------------------------------------
+
+Boards using a SoC of the Marvell Armada 37xx family must carry the
+following root node property:
+
+ - compatible: must contain "marvell,armada3710"
+
+In addition, boards using the Marvell Armada 3720 SoC shall have the
+following property before the previous one:
+
+ - compatible: must contain "marvell,armada3720"
+
+Example:
+
+compatible = "marvell,armada-3720-db", "marvell,armada3720", "marvell,armada3710";
diff --git a/dts/Bindings/arm/marvell/armada-380-mpcore-soc-ctrl.txt b/dts/Bindings/arm/marvell/armada-380-mpcore-soc-ctrl.txt
new file mode 100644
index 0000000000..8781073029
--- /dev/null
+++ b/dts/Bindings/arm/marvell/armada-380-mpcore-soc-ctrl.txt
@@ -0,0 +1,14 @@
+Marvell Armada 38x CA9 MPcore SoC Controller
+============================================
+
+Required properties:
+
+- compatible: Should be "marvell,armada-380-mpcore-soc-ctrl".
+
+- reg: should be the register base and length as documented in the
+ datasheet for the CA9 MPcore SoC Control registers
+
+mpcore-soc-ctrl@20d20 {
+ compatible = "marvell,armada-380-mpcore-soc-ctrl";
+ reg = <0x20d20 0x6c>;
+};
diff --git a/dts/Bindings/arm/marvell/armada-38x.txt b/dts/Bindings/arm/marvell/armada-38x.txt
new file mode 100644
index 0000000000..202953f188
--- /dev/null
+++ b/dts/Bindings/arm/marvell/armada-38x.txt
@@ -0,0 +1,27 @@
+Marvell Armada 38x Platforms Device Tree Bindings
+-------------------------------------------------
+
+Boards with a SoC of the Marvell Armada 38x family shall have the
+following property:
+
+Required root node property:
+
+ - compatible: must contain "marvell,armada380"
+
+In addition, boards using the Marvell Armada 385 SoC shall have the
+following property before the previous one:
+
+Required root node property:
+
+compatible: must contain "marvell,armada385"
+
+In addition, boards using the Marvell Armada 388 SoC shall have the
+following property before the previous one:
+
+Required root node property:
+
+compatible: must contain "marvell,armada388"
+
+Example:
+
+compatible = "marvell,a385-rd", "marvell,armada385", "marvell,armada380";
diff --git a/dts/Bindings/arm/marvell/armada-39x.txt b/dts/Bindings/arm/marvell/armada-39x.txt
new file mode 100644
index 0000000000..53d4ff9ea8
--- /dev/null
+++ b/dts/Bindings/arm/marvell/armada-39x.txt
@@ -0,0 +1,20 @@
+Marvell Armada 39x Platforms Device Tree Bindings
+-------------------------------------------------
+
+Boards with a SoC of the Marvell Armada 39x family shall have the
+following property:
+
+Required root node property:
+
+ - compatible: must contain "marvell,armada390"
+
+In addition, boards using the Marvell Armada 398 SoC shall have the
+following property before the previous one:
+
+Required root node property:
+
+compatible: must contain "marvell,armada398"
+
+Example:
+
+compatible = "marvell,a398-db", "marvell,armada398", "marvell,armada390";
diff --git a/dts/Bindings/arm/marvell/armada-7k-8k.txt b/dts/Bindings/arm/marvell/armada-7k-8k.txt
new file mode 100644
index 0000000000..df98a9c82a
--- /dev/null
+++ b/dts/Bindings/arm/marvell/armada-7k-8k.txt
@@ -0,0 +1,24 @@
+Marvell Armada 7K/8K Platforms Device Tree Bindings
+---------------------------------------------------
+
+Boards using a SoC of the Marvell Armada 7K or 8K families must carry
+the following root node property:
+
+ - compatible, with one of the following values:
+
+ - "marvell,armada7020", "marvell,armada-ap806-dual", "marvell,armada-ap806"
+ when the SoC being used is the Armada 7020
+
+ - "marvell,armada7040", "marvell,armada-ap806-quad", "marvell,armada-ap806"
+ when the SoC being used is the Armada 7040
+
+ - "marvell,armada8020", "marvell,armada-ap806-dual", "marvell,armada-ap806"
+ when the SoC being used is the Armada 8020
+
+ - "marvell,armada8040", "marvell,armada-ap806-quad", "marvell,armada-ap806"
+ when the SoC being used is the Armada 8040
+
+Example:
+
+compatible = "marvell,armada7040-db", "marvell,armada7040",
+ "marvell,armada-ap806-quad", "marvell,armada-ap806";
diff --git a/dts/Bindings/arm/marvell/armada-cpu-reset.txt b/dts/Bindings/arm/marvell/armada-cpu-reset.txt
new file mode 100644
index 0000000000..b63a7b6ab9
--- /dev/null
+++ b/dts/Bindings/arm/marvell/armada-cpu-reset.txt
@@ -0,0 +1,14 @@
+Marvell Armada CPU reset controller
+===================================
+
+Required properties:
+
+- compatible: Should be "marvell,armada-370-cpu-reset".
+
+- reg: should be register base and length as documented in the
+ datasheet for the CPU reset registers
+
+cpurst: cpurst@20800 {
+ compatible = "marvell,armada-370-cpu-reset";
+ reg = <0x20800 0x20>;
+};
diff --git a/dts/Bindings/arm/marvell/coherency-fabric.txt b/dts/Bindings/arm/marvell/coherency-fabric.txt
new file mode 100644
index 0000000000..9b5c3f620e
--- /dev/null
+++ b/dts/Bindings/arm/marvell/coherency-fabric.txt
@@ -0,0 +1,48 @@
+Coherency fabric
+----------------
+Available on Marvell SOCs: Armada 370, Armada 375, Armada 38x and Armada XP
+
+Required properties:
+
+- compatible: the possible values are:
+
+ * "marvell,coherency-fabric", to be used for the coherency fabric of
+ the Armada 370 and Armada XP.
+
+ * "marvell,armada-375-coherency-fabric", for the Armada 375 coherency
+ fabric.
+
+ * "marvell,armada-380-coherency-fabric", for the Armada 38x coherency
+ fabric.
+
+- reg: Should contain coherency fabric registers location and
+ length.
+
+ * For "marvell,coherency-fabric", the first pair for the coherency
+ fabric registers, second pair for the per-CPU fabric registers.
+
+ * For "marvell,armada-375-coherency-fabric", only one pair is needed
+ for the per-CPU fabric registers.
+
+ * For "marvell,armada-380-coherency-fabric", only one pair is needed
+ for the per-CPU fabric registers.
+
+Optional properties:
+
+- broken-idle: boolean to set when the Idle mode is not supported by the
+ hardware.
+
+Examples:
+
+coherency-fabric@d0020200 {
+ compatible = "marvell,coherency-fabric";
+ reg = <0xd0020200 0xb0>,
+ <0xd0021810 0x1c>;
+
+};
+
+coherency-fabric@21810 {
+ compatible = "marvell,armada-375-coherency-fabric";
+ reg = <0x21810 0x1c>;
+};
+
diff --git a/dts/Bindings/arm/marvell/kirkwood.txt b/dts/Bindings/arm/marvell/kirkwood.txt
new file mode 100644
index 0000000000..98cce9a653
--- /dev/null
+++ b/dts/Bindings/arm/marvell/kirkwood.txt
@@ -0,0 +1,27 @@
+Marvell Kirkwood Platforms Device Tree Bindings
+-----------------------------------------------
+
+Boards with a SoC of the Marvell Kirkwood
+shall have the following property:
+
+Required root node property:
+
+compatible: must contain "marvell,kirkwood";
+
+In order to support the kirkwood cpufreq driver, there must be a node
+cpus/cpu@0 with three clocks, "cpu_clk", "ddrclk" and "powersave",
+where the "powersave" clock is a gating clock used to switch the CPU
+between the "cpu_clk" and the "ddrclk".
+
+Example:
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu@0 {
+ device_type = "cpu";
+ compatible = "marvell,sheeva-88SV131";
+ clocks = <&core_clk 1>, <&core_clk 3>, <&gate_clk 11>;
+ clock-names = "cpu_clk", "ddrclk", "powersave";
+ };
diff --git a/dts/Bindings/arm/marvell/marvell,berlin.txt b/dts/Bindings/arm/marvell/marvell,berlin.txt
new file mode 100644
index 0000000000..3bab18409b
--- /dev/null
+++ b/dts/Bindings/arm/marvell/marvell,berlin.txt
@@ -0,0 +1,96 @@
+Marvell Berlin SoC Family Device Tree Bindings
+---------------------------------------------------------------
+
+Work in progress statement:
+
+Device tree files and bindings applying to Marvell Berlin SoCs and boards are
+considered "unstable". Any Marvell Berlin device tree binding may change at any
+time. Be sure to use a device tree binary and a kernel image generated from the
+same source tree.
+
+Please refer to Documentation/devicetree/bindings/ABI.txt for a definition of a
+stable binding/ABI.
+
+---------------------------------------------------------------
+
+Boards with a SoC of the Marvell Berlin family, e.g. Armada 1500
+shall have the following properties:
+
+* Required root node properties:
+compatible: must contain "marvell,berlin"
+
+In addition, the above compatible shall be extended with the specific
+SoC and board used. Currently known SoC compatibles are:
+ "marvell,berlin2" for Marvell Armada 1500 (BG2, 88DE3100),
+ "marvell,berlin2cd" for Marvell Armada 1500-mini (BG2CD, 88DE3005)
+ "marvell,berlin2ct" for Marvell Armada ? (BG2CT, 88DE????)
+ "marvell,berlin2q" for Marvell Armada 1500-pro (BG2Q, 88DE3114)
+ "marvell,berlin3" for Marvell Armada ? (BG3, 88DE????)
+
+* Example:
+
+/ {
+ model = "Sony NSZ-GS7";
+ compatible = "sony,nsz-gs7", "marvell,berlin2", "marvell,berlin";
+
+ ...
+}
+
+* Marvell Berlin CPU control bindings
+
+CPU control register allows various operations on CPUs, like resetting them
+independently.
+
+Required properties:
+- compatible: should be "marvell,berlin-cpu-ctrl"
+- reg: address and length of the register set
+
+Example:
+
+cpu-ctrl@f7dd0000 {
+ compatible = "marvell,berlin-cpu-ctrl";
+ reg = <0xf7dd0000 0x10000>;
+};
+
+* Marvell Berlin2 chip control binding
+
+Marvell Berlin SoCs have a chip control register set providing several
+individual registers dealing with pinmux, padmux, clock, reset, and secondary
+CPU boot address. Unfortunately, the individual registers are spread among the
+chip control registers, so there should be a single DT node only providing the
+different functions which are described below.
+
+Required properties:
+- compatible:
+ * the first and second values must be:
+ "simple-mfd", "syscon"
+- reg: address and length of following register sets for
+ BG2/BG2CD: chip control register set
+ BG2Q: chip control register set and cpu pll registers
+
+* Marvell Berlin2 system control binding
+
+Marvell Berlin SoCs have a system control register set providing several
+individual registers dealing with pinmux, padmux, and reset.
+
+Required properties:
+- compatible:
+ * the first and second values must be:
+ "simple-mfd", "syscon"
+- reg: address and length of the system control register set
+
+Example:
+
+chip: chip-control@ea0000 {
+ compatible = "simple-mfd", "syscon";
+ reg = <0xea0000 0x400>;
+
+ /* sub-device nodes */
+};
+
+sysctrl: system-controller@d000 {
+ compatible = "simple-mfd", "syscon";
+ reg = <0xd000 0x100>;
+
+ /* sub-device nodes */
+};
diff --git a/dts/Bindings/arm/marvell/marvell,dove.txt b/dts/Bindings/arm/marvell/marvell,dove.txt
new file mode 100644
index 0000000000..aaaf64c56e
--- /dev/null
+++ b/dts/Bindings/arm/marvell/marvell,dove.txt
@@ -0,0 +1,22 @@
+Marvell Dove Platforms Device Tree Bindings
+-----------------------------------------------
+
+Boards with a Marvell Dove SoC shall have the following properties:
+
+Required root node property:
+- compatible: must contain "marvell,dove";
+
+* Global Configuration registers
+
+Global Configuration registers of Dove SoC are shared by a syscon node.
+
+Required properties:
+- compatible: must contain "marvell,dove-global-config" and "syscon".
+- reg: base address and size of the Global Configuration registers.
+
+Example:
+
+gconf: global-config@e802c {
+ compatible = "marvell,dove-global-config", "syscon";
+ reg = <0xe802c 0x14>;
+};
diff --git a/dts/Bindings/arm/marvell/marvell,kirkwood.txt b/dts/Bindings/arm/marvell/marvell,kirkwood.txt
new file mode 100644
index 0000000000..7d28fe4bf6
--- /dev/null
+++ b/dts/Bindings/arm/marvell/marvell,kirkwood.txt
@@ -0,0 +1,105 @@
+Marvell Kirkwood SoC Family Device Tree Bindings
+------------------------------------------------
+
+Boards with a SoC of the Marvell Kirkwook family, eg 88f6281
+
+* Required root node properties:
+compatible: must contain "marvell,kirkwood"
+
+In addition, the above compatible shall be extended with the specific
+SoC. Currently known SoC compatibles are:
+
+"marvell,kirkwood-88f6192"
+"marvell,kirkwood-88f6281"
+"marvell,kirkwood-88f6282"
+"marvell,kirkwood-88f6283"
+"marvell,kirkwood-88f6702"
+"marvell,kirkwood-98DX4122"
+
+And in addition, the compatible shall be extended with the specific
+board. Currently known boards are:
+
+"buffalo,linkstation-lsqvl"
+"buffalo,linkstation-lsvl"
+"buffalo,linkstation-lswsxl"
+"buffalo,linkstation-lswxl"
+"buffalo,linkstation-lswvl"
+"buffalo,lschlv2"
+"buffalo,lsxhl"
+"buffalo,lsxl"
+"cloudengines,pogo02"
+"cloudengines,pogoplugv4"
+"dlink,dns-320"
+"dlink,dns-320-a1"
+"dlink,dns-325"
+"dlink,dns-325-a1"
+"dlink,dns-kirkwood"
+"excito,b3"
+"globalscale,dreamplug-003-ds2001"
+"globalscale,guruplug"
+"globalscale,guruplug-server-plus"
+"globalscale,sheevaplug"
+"globalscale,sheevaplug"
+"globalscale,sheevaplug-esata"
+"globalscale,sheevaplug-esata-rev13"
+"iom,iconnect"
+"iom,iconnect-1.1"
+"iom,ix2-200"
+"keymile,km_kirkwood"
+"lacie,cloudbox"
+"lacie,inetspace_v2"
+"lacie,laplug"
+"lacie,nas2big"
+"lacie,netspace_lite_v2"
+"lacie,netspace_max_v2"
+"lacie,netspace_mini_v2"
+"lacie,netspace_v2"
+"marvell,db-88f6281-bp"
+"marvell,db-88f6282-bp"
+"marvell,mv88f6281gtw-ge"
+"marvell,rd88f6281"
+"marvell,rd88f6281"
+"marvell,rd88f6281-a0"
+"marvell,rd88f6281-a1"
+"mpl,cec4"
+"mpl,cec4-10"
+"netgear,readynas"
+"netgear,readynas"
+"netgear,readynas-duo-v2"
+"netgear,readynas-nv+-v2"
+"plathome,openblocks-a6"
+"plathome,openblocks-a7"
+"raidsonic,ib-nas6210"
+"raidsonic,ib-nas6210-b"
+"raidsonic,ib-nas6220"
+"raidsonic,ib-nas6220-b"
+"raidsonic,ib-nas62x0"
+"seagate,dockstar"
+"seagate,goflexnet"
+"synology,ds109"
+"synology,ds110jv10"
+"synology,ds110jv20"
+"synology,ds110jv30"
+"synology,ds111"
+"synology,ds209"
+"synology,ds210jv10"
+"synology,ds210jv20"
+"synology,ds212"
+"synology,ds212jv10"
+"synology,ds212jv20"
+"synology,ds212pv10"
+"synology,ds409"
+"synology,ds409slim"
+"synology,ds410j"
+"synology,ds411"
+"synology,ds411j"
+"synology,ds411slim"
+"synology,ds413jv10"
+"synology,rs212"
+"synology,rs409"
+"synology,rs411"
+"synology,rs812"
+"usi,topkick"
+"usi,topkick-1281P2"
+"zyxel,nsa310"
+"zyxel,nsa310a"
diff --git a/dts/Bindings/arm/marvell/mvebu-cpu-config.txt b/dts/Bindings/arm/marvell/mvebu-cpu-config.txt
new file mode 100644
index 0000000000..2cdcd716da
--- /dev/null
+++ b/dts/Bindings/arm/marvell/mvebu-cpu-config.txt
@@ -0,0 +1,20 @@
+MVEBU CPU Config registers
+--------------------------
+
+MVEBU (Marvell SOCs: Armada 370/XP)
+
+Required properties:
+
+- compatible: one of:
+ - "marvell,armada-370-cpu-config"
+ - "marvell,armada-xp-cpu-config"
+
+- reg: Should contain CPU config registers location and length, in
+ their per-CPU variant
+
+Example:
+
+ cpu-config@21000 {
+ compatible = "marvell,armada-xp-cpu-config";
+ reg = <0x21000 0x8>;
+ };
diff --git a/dts/Bindings/arm/marvell/mvebu-system-controller.txt b/dts/Bindings/arm/marvell/mvebu-system-controller.txt
new file mode 100644
index 0000000000..d24ab2ebf8
--- /dev/null
+++ b/dts/Bindings/arm/marvell/mvebu-system-controller.txt
@@ -0,0 +1,18 @@
+MVEBU System Controller
+-----------------------
+MVEBU (Marvell SOCs: Armada 370/375/XP, Dove, mv78xx0, Kirkwood, Orion5x)
+
+Required properties:
+
+- compatible: one of:
+ - "marvell,orion-system-controller"
+ - "marvell,armada-370-xp-system-controller"
+ - "marvell,armada-375-system-controller"
+- reg: Should contain system controller registers location and length.
+
+Example:
+
+ system-controller@d0018200 {
+ compatible = "marvell,armada-370-xp-system-controller";
+ reg = <0xd0018200 0x500>;
+ };