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author | Sascha Hauer <s.hauer@pengutronix.de> | 2017-11-28 11:02:14 +0100 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2017-11-28 11:06:44 +0100 |
commit | 2e9cce8fb1f577088e2b20ae2f461130e13ad190 (patch) | |
tree | f82ae53e88d36e07608be1b3159da296ed025ef1 /dts/Bindings/arm/mediatek/mediatek,audsys.txt | |
parent | c68d466d263827692aa809e6b34abb90a1cab515 (diff) | |
download | barebox-2e9cce8fb1f577088e2b20ae2f461130e13ad190.tar.gz barebox-2e9cce8fb1f577088e2b20ae2f461130e13ad190.tar.xz |
dts: update to v4.15-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings/arm/mediatek/mediatek,audsys.txt')
-rw-r--r-- | dts/Bindings/arm/mediatek/mediatek,audsys.txt | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/dts/Bindings/arm/mediatek/mediatek,audsys.txt b/dts/Bindings/arm/mediatek/mediatek,audsys.txt new file mode 100644 index 0000000000..9b8f578d5e --- /dev/null +++ b/dts/Bindings/arm/mediatek/mediatek,audsys.txt @@ -0,0 +1,22 @@ +MediaTek AUDSYS controller +============================ + +The MediaTek AUDSYS controller provides various clocks to the system. + +Required Properties: + +- compatible: Should be one of: + - "mediatek,mt7622-audsys", "syscon" +- #clock-cells: Must be 1 + +The AUDSYS controller uses the common clk binding from +Documentation/devicetree/bindings/clock/clock-bindings.txt +The available clocks are defined in dt-bindings/clock/mt*-clk.h. + +Example: + +audsys: audsys@11220000 { + compatible = "mediatek,mt7622-audsys", "syscon"; + reg = <0 0x11220000 0 0x1000>; + #clock-cells = <1>; +}; |