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authorSascha Hauer <s.hauer@pengutronix.de>2017-11-28 11:02:14 +0100
committerSascha Hauer <s.hauer@pengutronix.de>2017-11-28 11:06:44 +0100
commit2e9cce8fb1f577088e2b20ae2f461130e13ad190 (patch)
treef82ae53e88d36e07608be1b3159da296ed025ef1 /dts/Bindings/arm/mediatek
parentc68d466d263827692aa809e6b34abb90a1cab515 (diff)
downloadbarebox-2e9cce8fb1f577088e2b20ae2f461130e13ad190.tar.gz
barebox-2e9cce8fb1f577088e2b20ae2f461130e13ad190.tar.xz
dts: update to v4.15-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings/arm/mediatek')
-rw-r--r--dts/Bindings/arm/mediatek/mediatek,apmixedsys.txt2
-rw-r--r--dts/Bindings/arm/mediatek/mediatek,audsys.txt22
-rw-r--r--dts/Bindings/arm/mediatek/mediatek,bdpsys.txt1
-rw-r--r--dts/Bindings/arm/mediatek/mediatek,ethsys.txt1
-rw-r--r--dts/Bindings/arm/mediatek/mediatek,hifsys.txt1
-rw-r--r--dts/Bindings/arm/mediatek/mediatek,imgsys.txt1
-rw-r--r--dts/Bindings/arm/mediatek/mediatek,infracfg.txt2
-rw-r--r--dts/Bindings/arm/mediatek/mediatek,jpgdecsys.txt22
-rw-r--r--dts/Bindings/arm/mediatek/mediatek,mcucfg.txt22
-rw-r--r--dts/Bindings/arm/mediatek/mediatek,mfgcfg.txt22
-rw-r--r--dts/Bindings/arm/mediatek/mediatek,mmsys.txt1
-rw-r--r--dts/Bindings/arm/mediatek/mediatek,pciesys.txt22
-rw-r--r--dts/Bindings/arm/mediatek/mediatek,pericfg.txt2
-rw-r--r--dts/Bindings/arm/mediatek/mediatek,sgmiisys.txt22
-rw-r--r--dts/Bindings/arm/mediatek/mediatek,ssusbsys.txt22
-rw-r--r--dts/Bindings/arm/mediatek/mediatek,topckgen.txt2
-rw-r--r--dts/Bindings/arm/mediatek/mediatek,vdecsys.txt1
-rw-r--r--dts/Bindings/arm/mediatek/mediatek,vencsys.txt1
18 files changed, 169 insertions, 0 deletions
diff --git a/dts/Bindings/arm/mediatek/mediatek,apmixedsys.txt b/dts/Bindings/arm/mediatek/mediatek,apmixedsys.txt
index cd977db763..b404d592ce 100644
--- a/dts/Bindings/arm/mediatek/mediatek,apmixedsys.txt
+++ b/dts/Bindings/arm/mediatek/mediatek,apmixedsys.txt
@@ -7,7 +7,9 @@ Required Properties:
- compatible: Should be one of:
- "mediatek,mt2701-apmixedsys"
+ - "mediatek,mt2712-apmixedsys", "syscon"
- "mediatek,mt6797-apmixedsys"
+ - "mediatek,mt7622-apmixedsys"
- "mediatek,mt8135-apmixedsys"
- "mediatek,mt8173-apmixedsys"
- #clock-cells: Must be 1
diff --git a/dts/Bindings/arm/mediatek/mediatek,audsys.txt b/dts/Bindings/arm/mediatek/mediatek,audsys.txt
new file mode 100644
index 0000000000..9b8f578d5e
--- /dev/null
+++ b/dts/Bindings/arm/mediatek/mediatek,audsys.txt
@@ -0,0 +1,22 @@
+MediaTek AUDSYS controller
+============================
+
+The MediaTek AUDSYS controller provides various clocks to the system.
+
+Required Properties:
+
+- compatible: Should be one of:
+ - "mediatek,mt7622-audsys", "syscon"
+- #clock-cells: Must be 1
+
+The AUDSYS controller uses the common clk binding from
+Documentation/devicetree/bindings/clock/clock-bindings.txt
+The available clocks are defined in dt-bindings/clock/mt*-clk.h.
+
+Example:
+
+audsys: audsys@11220000 {
+ compatible = "mediatek,mt7622-audsys", "syscon";
+ reg = <0 0x11220000 0 0x1000>;
+ #clock-cells = <1>;
+};
diff --git a/dts/Bindings/arm/mediatek/mediatek,bdpsys.txt b/dts/Bindings/arm/mediatek/mediatek,bdpsys.txt
index 4137196dd6..4010e37c53 100644
--- a/dts/Bindings/arm/mediatek/mediatek,bdpsys.txt
+++ b/dts/Bindings/arm/mediatek/mediatek,bdpsys.txt
@@ -7,6 +7,7 @@ Required Properties:
- compatible: Should be:
- "mediatek,mt2701-bdpsys", "syscon"
+ - "mediatek,mt2712-bdpsys", "syscon"
- #clock-cells: Must be 1
The bdpsys controller uses the common clk binding from
diff --git a/dts/Bindings/arm/mediatek/mediatek,ethsys.txt b/dts/Bindings/arm/mediatek/mediatek,ethsys.txt
index 768f3a5bc0..7aa3fa1676 100644
--- a/dts/Bindings/arm/mediatek/mediatek,ethsys.txt
+++ b/dts/Bindings/arm/mediatek/mediatek,ethsys.txt
@@ -7,6 +7,7 @@ Required Properties:
- compatible: Should be:
- "mediatek,mt2701-ethsys", "syscon"
+ - "mediatek,mt7622-ethsys", "syscon"
- #clock-cells: Must be 1
The ethsys controller uses the common clk binding from
diff --git a/dts/Bindings/arm/mediatek/mediatek,hifsys.txt b/dts/Bindings/arm/mediatek/mediatek,hifsys.txt
index beed7b594c..f5629d64ce 100644
--- a/dts/Bindings/arm/mediatek/mediatek,hifsys.txt
+++ b/dts/Bindings/arm/mediatek/mediatek,hifsys.txt
@@ -8,6 +8,7 @@ Required Properties:
- compatible: Should be:
- "mediatek,mt2701-hifsys", "syscon"
+ - "mediatek,mt7622-hifsys", "syscon"
- #clock-cells: Must be 1
The hifsys controller uses the common clk binding from
diff --git a/dts/Bindings/arm/mediatek/mediatek,imgsys.txt b/dts/Bindings/arm/mediatek/mediatek,imgsys.txt
index 047b11ae5f..868bd51a98 100644
--- a/dts/Bindings/arm/mediatek/mediatek,imgsys.txt
+++ b/dts/Bindings/arm/mediatek/mediatek,imgsys.txt
@@ -7,6 +7,7 @@ Required Properties:
- compatible: Should be one of:
- "mediatek,mt2701-imgsys", "syscon"
+ - "mediatek,mt2712-imgsys", "syscon"
- "mediatek,mt6797-imgsys", "syscon"
- "mediatek,mt8173-imgsys", "syscon"
- #clock-cells: Must be 1
diff --git a/dts/Bindings/arm/mediatek/mediatek,infracfg.txt b/dts/Bindings/arm/mediatek/mediatek,infracfg.txt
index 58d58e2006..566f153f9f 100644
--- a/dts/Bindings/arm/mediatek/mediatek,infracfg.txt
+++ b/dts/Bindings/arm/mediatek/mediatek,infracfg.txt
@@ -8,7 +8,9 @@ Required Properties:
- compatible: Should be one of:
- "mediatek,mt2701-infracfg", "syscon"
+ - "mediatek,mt2712-infracfg", "syscon"
- "mediatek,mt6797-infracfg", "syscon"
+ - "mediatek,mt7622-infracfg", "syscon"
- "mediatek,mt8135-infracfg", "syscon"
- "mediatek,mt8173-infracfg", "syscon"
- #clock-cells: Must be 1
diff --git a/dts/Bindings/arm/mediatek/mediatek,jpgdecsys.txt b/dts/Bindings/arm/mediatek/mediatek,jpgdecsys.txt
new file mode 100644
index 0000000000..2df799cd06
--- /dev/null
+++ b/dts/Bindings/arm/mediatek/mediatek,jpgdecsys.txt
@@ -0,0 +1,22 @@
+Mediatek jpgdecsys controller
+============================
+
+The Mediatek jpgdecsys controller provides various clocks to the system.
+
+Required Properties:
+
+- compatible: Should be:
+ - "mediatek,mt2712-jpgdecsys", "syscon"
+- #clock-cells: Must be 1
+
+The jpgdecsys controller uses the common clk binding from
+Documentation/devicetree/bindings/clock/clock-bindings.txt
+The available clocks are defined in dt-bindings/clock/mt*-clk.h.
+
+Example:
+
+jpgdecsys: syscon@19000000 {
+ compatible = "mediatek,mt2712-jpgdecsys", "syscon";
+ reg = <0 0x19000000 0 0x1000>;
+ #clock-cells = <1>;
+};
diff --git a/dts/Bindings/arm/mediatek/mediatek,mcucfg.txt b/dts/Bindings/arm/mediatek/mediatek,mcucfg.txt
new file mode 100644
index 0000000000..b8fb03f361
--- /dev/null
+++ b/dts/Bindings/arm/mediatek/mediatek,mcucfg.txt
@@ -0,0 +1,22 @@
+Mediatek mcucfg controller
+============================
+
+The Mediatek mcucfg controller provides various clocks to the system.
+
+Required Properties:
+
+- compatible: Should be one of:
+ - "mediatek,mt2712-mcucfg", "syscon"
+- #clock-cells: Must be 1
+
+The mcucfg controller uses the common clk binding from
+Documentation/devicetree/bindings/clock/clock-bindings.txt
+The available clocks are defined in dt-bindings/clock/mt*-clk.h.
+
+Example:
+
+mcucfg: syscon@10220000 {
+ compatible = "mediatek,mt2712-mcucfg", "syscon";
+ reg = <0 0x10220000 0 0x1000>;
+ #clock-cells = <1>;
+};
diff --git a/dts/Bindings/arm/mediatek/mediatek,mfgcfg.txt b/dts/Bindings/arm/mediatek/mediatek,mfgcfg.txt
new file mode 100644
index 0000000000..859e67b416
--- /dev/null
+++ b/dts/Bindings/arm/mediatek/mediatek,mfgcfg.txt
@@ -0,0 +1,22 @@
+Mediatek mfgcfg controller
+============================
+
+The Mediatek mfgcfg controller provides various clocks to the system.
+
+Required Properties:
+
+- compatible: Should be one of:
+ - "mediatek,mt2712-mfgcfg", "syscon"
+- #clock-cells: Must be 1
+
+The mfgcfg controller uses the common clk binding from
+Documentation/devicetree/bindings/clock/clock-bindings.txt
+The available clocks are defined in dt-bindings/clock/mt*-clk.h.
+
+Example:
+
+mfgcfg: syscon@13000000 {
+ compatible = "mediatek,mt2712-mfgcfg", "syscon";
+ reg = <0 0x13000000 0 0x1000>;
+ #clock-cells = <1>;
+};
diff --git a/dts/Bindings/arm/mediatek/mediatek,mmsys.txt b/dts/Bindings/arm/mediatek/mediatek,mmsys.txt
index 70529e0b58..4eb8bbe15c 100644
--- a/dts/Bindings/arm/mediatek/mediatek,mmsys.txt
+++ b/dts/Bindings/arm/mediatek/mediatek,mmsys.txt
@@ -7,6 +7,7 @@ Required Properties:
- compatible: Should be one of:
- "mediatek,mt2701-mmsys", "syscon"
+ - "mediatek,mt2712-mmsys", "syscon"
- "mediatek,mt6797-mmsys", "syscon"
- "mediatek,mt8173-mmsys", "syscon"
- #clock-cells: Must be 1
diff --git a/dts/Bindings/arm/mediatek/mediatek,pciesys.txt b/dts/Bindings/arm/mediatek/mediatek,pciesys.txt
new file mode 100644
index 0000000000..d5d5f12276
--- /dev/null
+++ b/dts/Bindings/arm/mediatek/mediatek,pciesys.txt
@@ -0,0 +1,22 @@
+MediaTek PCIESYS controller
+============================
+
+The MediaTek PCIESYS controller provides various clocks to the system.
+
+Required Properties:
+
+- compatible: Should be:
+ - "mediatek,mt7622-pciesys", "syscon"
+- #clock-cells: Must be 1
+
+The PCIESYS controller uses the common clk binding from
+Documentation/devicetree/bindings/clock/clock-bindings.txt
+The available clocks are defined in dt-bindings/clock/mt*-clk.h.
+
+Example:
+
+pciesys: pciesys@1a100800 {
+ compatible = "mediatek,mt7622-pciesys", "syscon";
+ reg = <0 0x1a100800 0 0x1000>;
+ #clock-cells = <1>;
+};
diff --git a/dts/Bindings/arm/mediatek/mediatek,pericfg.txt b/dts/Bindings/arm/mediatek/mediatek,pericfg.txt
index e494366782..fb58ca8c27 100644
--- a/dts/Bindings/arm/mediatek/mediatek,pericfg.txt
+++ b/dts/Bindings/arm/mediatek/mediatek,pericfg.txt
@@ -8,6 +8,8 @@ Required Properties:
- compatible: Should be one of:
- "mediatek,mt2701-pericfg", "syscon"
+ - "mediatek,mt2712-pericfg", "syscon"
+ - "mediatek,mt7622-pericfg", "syscon"
- "mediatek,mt8135-pericfg", "syscon"
- "mediatek,mt8173-pericfg", "syscon"
- #clock-cells: Must be 1
diff --git a/dts/Bindings/arm/mediatek/mediatek,sgmiisys.txt b/dts/Bindings/arm/mediatek/mediatek,sgmiisys.txt
new file mode 100644
index 0000000000..d113b8e741
--- /dev/null
+++ b/dts/Bindings/arm/mediatek/mediatek,sgmiisys.txt
@@ -0,0 +1,22 @@
+MediaTek SGMIISYS controller
+============================
+
+The MediaTek SGMIISYS controller provides various clocks to the system.
+
+Required Properties:
+
+- compatible: Should be:
+ - "mediatek,mt7622-sgmiisys", "syscon"
+- #clock-cells: Must be 1
+
+The SGMIISYS controller uses the common clk binding from
+Documentation/devicetree/bindings/clock/clock-bindings.txt
+The available clocks are defined in dt-bindings/clock/mt*-clk.h.
+
+Example:
+
+sgmiisys: sgmiisys@1b128000 {
+ compatible = "mediatek,mt7622-sgmiisys", "syscon";
+ reg = <0 0x1b128000 0 0x1000>;
+ #clock-cells = <1>;
+};
diff --git a/dts/Bindings/arm/mediatek/mediatek,ssusbsys.txt b/dts/Bindings/arm/mediatek/mediatek,ssusbsys.txt
new file mode 100644
index 0000000000..00760019da
--- /dev/null
+++ b/dts/Bindings/arm/mediatek/mediatek,ssusbsys.txt
@@ -0,0 +1,22 @@
+MediaTek SSUSBSYS controller
+============================
+
+The MediaTek SSUSBSYS controller provides various clocks to the system.
+
+Required Properties:
+
+- compatible: Should be:
+ - "mediatek,mt7622-ssusbsys", "syscon"
+- #clock-cells: Must be 1
+
+The SSUSBSYS controller uses the common clk binding from
+Documentation/devicetree/bindings/clock/clock-bindings.txt
+The available clocks are defined in dt-bindings/clock/mt*-clk.h.
+
+Example:
+
+ssusbsys: ssusbsys@1a000000 {
+ compatible = "mediatek,mt7622-ssusbsys", "syscon";
+ reg = <0 0x1a000000 0 0x1000>;
+ #clock-cells = <1>;
+};
diff --git a/dts/Bindings/arm/mediatek/mediatek,topckgen.txt b/dts/Bindings/arm/mediatek/mediatek,topckgen.txt
index ec93ecbb9f..24014a7e23 100644
--- a/dts/Bindings/arm/mediatek/mediatek,topckgen.txt
+++ b/dts/Bindings/arm/mediatek/mediatek,topckgen.txt
@@ -7,7 +7,9 @@ Required Properties:
- compatible: Should be one of:
- "mediatek,mt2701-topckgen"
+ - "mediatek,mt2712-topckgen", "syscon"
- "mediatek,mt6797-topckgen"
+ - "mediatek,mt7622-topckgen"
- "mediatek,mt8135-topckgen"
- "mediatek,mt8173-topckgen"
- #clock-cells: Must be 1
diff --git a/dts/Bindings/arm/mediatek/mediatek,vdecsys.txt b/dts/Bindings/arm/mediatek/mediatek,vdecsys.txt
index d150104f92..ea40d05089 100644
--- a/dts/Bindings/arm/mediatek/mediatek,vdecsys.txt
+++ b/dts/Bindings/arm/mediatek/mediatek,vdecsys.txt
@@ -7,6 +7,7 @@ Required Properties:
- compatible: Should be one of:
- "mediatek,mt2701-vdecsys", "syscon"
+ - "mediatek,mt2712-vdecsys", "syscon"
- "mediatek,mt6797-vdecsys", "syscon"
- "mediatek,mt8173-vdecsys", "syscon"
- #clock-cells: Must be 1
diff --git a/dts/Bindings/arm/mediatek/mediatek,vencsys.txt b/dts/Bindings/arm/mediatek/mediatek,vencsys.txt
index 8a93be6436..851545357e 100644
--- a/dts/Bindings/arm/mediatek/mediatek,vencsys.txt
+++ b/dts/Bindings/arm/mediatek/mediatek,vencsys.txt
@@ -6,6 +6,7 @@ The Mediatek vencsys controller provides various clocks to the system.
Required Properties:
- compatible: Should be one of:
+ - "mediatek,mt2712-vencsys", "syscon"
- "mediatek,mt6797-vencsys", "syscon"
- "mediatek,mt8173-vencsys", "syscon"
- #clock-cells: Must be 1