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authorRobin van der Gracht <robin@protonic.nl>2022-06-21 12:15:29 +0200
committerSascha Hauer <s.hauer@pengutronix.de>2022-06-22 09:29:23 +0200
commit63ef678dec6899fc947d0abd21ea4984792624ad (patch)
treecdbb1033aaa6d3b45f47b4ea819ec5c1451fd3a0 /dts/Bindings/arm/omap
parent339737fcf0a7c4be1d1984283619cb14aaee6aff (diff)
downloadbarebox-63ef678dec6899fc947d0abd21ea4984792624ad.tar.gz
barebox-63ef678dec6899fc947d0abd21ea4984792624ad.tar.xz
mci: imx-esdhc-common: Don't clear unhandled status bits
A DMA cmd + data transfer can finish or stop (i.e. on a block gap) before the status register is cleared. In that case we'll lose track of state causing sdhci_transfer_data_dma() to loop forever waiting for status bits that are already cleared. Clearing SDHCI_INT_CMD_COMPLETE should suffice here. Since it's not evaluated a second time, clearing it at the start of the function is sufficient so we can just remove the erroneous status write. Signed-off-by: Robin van der Gracht <robin@protonic.nl> Link: https://lore.barebox.org/20220621101529.554322-1-robin@protonic.nl Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings/arm/omap')
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