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| author | Sascha Hauer <s.hauer@pengutronix.de> | 2015-12-08 07:33:36 +0100 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2015-12-10 08:48:39 +0100 |
| commit | a05d5c206c91b17eb13ab9631d93e0a9b6fb92f8 (patch) | |
| tree | 69bb9a750c3f22308887a30b37e946b2738e33d4 /dts/Bindings/arm/pmu.txt | |
| parent | 48c682bcb09e2073d7eb07b4ce2ffbbf20d02d59 (diff) | |
| download | barebox-a05d5c206c91b17eb13ab9631d93e0a9b6fb92f8.tar.gz barebox-a05d5c206c91b17eb13ab9631d93e0a9b6fb92f8.tar.xz | |
dts: update to v4.3-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings/arm/pmu.txt')
| -rw-r--r-- | dts/Bindings/arm/pmu.txt | 12 |
1 files changed, 9 insertions, 3 deletions
diff --git a/dts/Bindings/arm/pmu.txt b/dts/Bindings/arm/pmu.txt index 3b5f5d1088..435251fa9c 100644 --- a/dts/Bindings/arm/pmu.txt +++ b/dts/Bindings/arm/pmu.txt @@ -26,13 +26,19 @@ Required properties: Optional properties: -- interrupt-affinity : Valid only when using SPIs, specifies a list of phandles - to CPU nodes corresponding directly to the affinity of +- interrupt-affinity : When using SPIs, specifies a list of phandles to CPU + nodes corresponding directly to the affinity of the SPIs listed in the interrupts property. - This property should be present when there is more than + When using a PPI, specifies a list of phandles to CPU + nodes corresponding to the set of CPUs which have + a PMU of this type signalling the PPI listed in the + interrupts property. + + This property should be present when there is more than a single SPI. + - qcom,no-pc-write : Indicates that this PMU doesn't support the 0xc and 0xd events. |