diff options
author | Sascha Hauer <s.hauer@pengutronix.de> | 2014-10-21 13:11:04 +0200 |
---|---|---|
committer | Sascha Hauer <s.hauer@pengutronix.de> | 2014-10-21 13:11:04 +0200 |
commit | 604ad71929a1deabe77b7ab9c3655d82002d79c9 (patch) | |
tree | 8640b00b7d9945560f3b31dd3efd947f08d0d319 /dts/Bindings/arm/samsung | |
parent | 826d399c448b4e08d73731448d0400c449e9fc58 (diff) | |
download | barebox-604ad71929a1deabe77b7ab9c3655d82002d79c9.tar.gz barebox-604ad71929a1deabe77b7ab9c3655d82002d79c9.tar.xz |
dts: update to v3.18-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings/arm/samsung')
-rw-r--r-- | dts/Bindings/arm/samsung/exynos-adc.txt | 18 |
1 files changed, 15 insertions, 3 deletions
diff --git a/dts/Bindings/arm/samsung/exynos-adc.txt b/dts/Bindings/arm/samsung/exynos-adc.txt index adc61b095b..709efaa308 100644 --- a/dts/Bindings/arm/samsung/exynos-adc.txt +++ b/dts/Bindings/arm/samsung/exynos-adc.txt @@ -11,13 +11,25 @@ New driver handles the following Required properties: - compatible: Must be "samsung,exynos-adc-v1" - for exynos4412/5250 controllers. + for exynos4412/5250 and s5pv210 controllers. Must be "samsung,exynos-adc-v2" for future controllers. Must be "samsung,exynos3250-adc" for controllers compatible with ADC of Exynos3250. -- reg: Contains ADC register address range (base address and - length) and the address of the phy enable register. + Must be "samsung,s3c2410-adc" for + the ADC in s3c2410 and compatibles + Must be "samsung,s3c2416-adc" for + the ADC in s3c2416 and compatibles + Must be "samsung,s3c2440-adc" for + the ADC in s3c2440 and compatibles + Must be "samsung,s3c2443-adc" for + the ADC in s3c2443 and compatibles + Must be "samsung,s3c6410-adc" for + the ADC in s3c6410 and compatibles +- reg: List of ADC register address range + - The base address and range of ADC register + - The base address and range of ADC_PHY register (every + SoC except for s3c24xx/s3c64xx ADC) - interrupts: Contains the interrupt information for the timer. The format is being dependent on which interrupt controller the Samsung device uses. |