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authorSascha Hauer <s.hauer@pengutronix.de>2015-12-08 07:33:55 +0100
committerSascha Hauer <s.hauer@pengutronix.de>2015-12-10 08:48:40 +0100
commit940968e2208b97d74e18b082500f35e463bcece5 (patch)
tree206eb7f6adcd584407f48057a475cb8f4c4f64ff /dts/Bindings/arm
parenta05d5c206c91b17eb13ab9631d93e0a9b6fb92f8 (diff)
downloadbarebox-940968e2208b97d74e18b082500f35e463bcece5.tar.gz
dts: update to v4.3-rc3
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings/arm')
-rw-r--r--dts/Bindings/arm/gic-v3.txt5
-rw-r--r--dts/Bindings/arm/idle-states.txt2
2 files changed, 6 insertions, 1 deletions
diff --git a/dts/Bindings/arm/gic-v3.txt b/dts/Bindings/arm/gic-v3.txt
index ddfade4..7803e77 100644
--- a/dts/Bindings/arm/gic-v3.txt
+++ b/dts/Bindings/arm/gic-v3.txt
@@ -57,6 +57,8 @@ used to route Message Signalled Interrupts (MSI) to the CPUs.
These nodes must have the following properties:
- compatible : Should at least contain "arm,gic-v3-its".
- msi-controller : Boolean property. Identifies the node as an MSI controller
+- #msi-cells: Must be <1>. The single msi-cell is the DeviceID of the device
+ which will generate the MSI.
- reg: Specifies the base physical address and size of the ITS
registers.
@@ -83,6 +85,7 @@ Examples:
gic-its@2c200000 {
compatible = "arm,gic-v3-its";
msi-controller;
+ #msi-cells = <1>;
reg = <0x0 0x2c200000 0 0x200000>;
};
};
@@ -107,12 +110,14 @@ Examples:
gic-its@2c200000 {
compatible = "arm,gic-v3-its";
msi-controller;
+ #msi-cells = <1>;
reg = <0x0 0x2c200000 0 0x200000>;
};
gic-its@2c400000 {
compatible = "arm,gic-v3-its";
msi-controller;
+ #msi-cells = <1>;
reg = <0x0 0x2c400000 0 0x200000>;
};
};
diff --git a/dts/Bindings/arm/idle-states.txt b/dts/Bindings/arm/idle-states.txt
index a8274ea..b8e41c1 100644
--- a/dts/Bindings/arm/idle-states.txt
+++ b/dts/Bindings/arm/idle-states.txt
@@ -497,7 +497,7 @@ cpus {
};
idle-states {
- entry-method = "arm,psci";
+ entry-method = "psci";
CPU_RETENTION_0_0: cpu-retention-0-0 {
compatible = "arm,idle-state";