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authorSascha Hauer <s.hauer@pengutronix.de>2016-06-13 07:29:57 +0200
committerSascha Hauer <s.hauer@pengutronix.de>2016-06-13 07:29:57 +0200
commita4f4bc65b33164eb8c19bcff9834cc87bcc845bb (patch)
treeef97762be5b614f160e9affddd1bbbec43c007dc /dts/Bindings/arm
parent83e61900b02965d01f0885e2db2077df35be7f56 (diff)
downloadbarebox-a4f4bc65b33164eb8c19bcff9834cc87bcc845bb.tar.gz
dts: update to v4.6-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings/arm')
-rw-r--r--dts/Bindings/arm/altera/socfpga-eccmgr.txt49
-rw-r--r--dts/Bindings/arm/amlogic.txt7
-rw-r--r--dts/Bindings/arm/arm-boards5
-rw-r--r--dts/Bindings/arm/axis.txt29
-rw-r--r--dts/Bindings/arm/bcm/brcm,vulcan-soc.txt10
-rw-r--r--dts/Bindings/arm/cci.txt2
-rw-r--r--dts/Bindings/arm/cpus.txt4
-rw-r--r--dts/Bindings/arm/fw-cfg.txt38
-rw-r--r--dts/Bindings/arm/keystone/keystone.txt5
-rw-r--r--dts/Bindings/arm/marvell/armada-370-xp-pmsu.txt (renamed from dts/Bindings/arm/armada-370-xp-pmsu.txt)0
-rw-r--r--dts/Bindings/arm/marvell/armada-370-xp.txt (renamed from dts/Bindings/arm/armada-370-xp.txt)0
-rw-r--r--dts/Bindings/arm/marvell/armada-375.txt (renamed from dts/Bindings/arm/armada-375.txt)0
-rw-r--r--dts/Bindings/arm/marvell/armada-37xx.txt16
-rw-r--r--dts/Bindings/arm/marvell/armada-380-mpcore-soc-ctrl.txt (renamed from dts/Bindings/arm/armada-380-mpcore-soc-ctrl.txt)0
-rw-r--r--dts/Bindings/arm/marvell/armada-38x.txt (renamed from dts/Bindings/arm/armada-38x.txt)0
-rw-r--r--dts/Bindings/arm/marvell/armada-39x.txt (renamed from dts/Bindings/arm/armada-39x.txt)0
-rw-r--r--dts/Bindings/arm/marvell/armada-7k-8k.txt24
-rw-r--r--dts/Bindings/arm/marvell/armada-cpu-reset.txt (renamed from dts/Bindings/arm/armada-cpu-reset.txt)0
-rw-r--r--dts/Bindings/arm/marvell/coherency-fabric.txt (renamed from dts/Bindings/arm/coherency-fabric.txt)0
-rw-r--r--dts/Bindings/arm/marvell/kirkwood.txt (renamed from dts/Bindings/arm/kirkwood.txt)0
-rw-r--r--dts/Bindings/arm/marvell/marvell,berlin.txt (renamed from dts/Bindings/arm/marvell,berlin.txt)0
-rw-r--r--dts/Bindings/arm/marvell/marvell,dove.txt (renamed from dts/Bindings/arm/marvell,dove.txt)0
-rw-r--r--dts/Bindings/arm/marvell/marvell,kirkwood.txt (renamed from dts/Bindings/arm/marvell,kirkwood.txt)7
-rw-r--r--dts/Bindings/arm/marvell/mvebu-cpu-config.txt (renamed from dts/Bindings/arm/mvebu-cpu-config.txt)0
-rw-r--r--dts/Bindings/arm/marvell/mvebu-system-controller.txt (renamed from dts/Bindings/arm/mvebu-system-controller.txt)0
-rw-r--r--dts/Bindings/arm/mediatek.txt4
-rw-r--r--dts/Bindings/arm/nxp/lpc32xx.txt (renamed from dts/Bindings/arm/lpc32xx.txt)0
-rw-r--r--dts/Bindings/arm/omap/omap.txt2
-rw-r--r--dts/Bindings/arm/pmu.txt11
-rw-r--r--dts/Bindings/arm/qcom.txt51
-rw-r--r--dts/Bindings/arm/sunxi.txt1
31 files changed, 224 insertions, 41 deletions
diff --git a/dts/Bindings/arm/altera/socfpga-eccmgr.txt b/dts/Bindings/arm/altera/socfpga-eccmgr.txt
new file mode 100644
index 0000000..885f93d
--- /dev/null
+++ b/dts/Bindings/arm/altera/socfpga-eccmgr.txt
@@ -0,0 +1,49 @@
+Altera SoCFPGA ECC Manager
+This driver uses the EDAC framework to implement the SOCFPGA ECC Manager.
+The ECC Manager counts and corrects single bit errors and counts/handles
+double bit errors which are uncorrectable.
+
+Required Properties:
+- compatible : Should be "altr,socfpga-ecc-manager"
+- #address-cells: must be 1
+- #size-cells: must be 1
+- ranges : standard definition, should translate from local addresses
+
+Subcomponents:
+
+L2 Cache ECC
+Required Properties:
+- compatible : Should be "altr,socfpga-l2-ecc"
+- reg : Address and size for ECC error interrupt clear registers.
+- interrupts : Should be single bit error interrupt, then double bit error
+ interrupt. Note the rising edge type.
+
+On Chip RAM ECC
+Required Properties:
+- compatible : Should be "altr,socfpga-ocram-ecc"
+- reg : Address and size for ECC error interrupt clear registers.
+- iram : phandle to On-Chip RAM definition.
+- interrupts : Should be single bit error interrupt, then double bit error
+ interrupt. Note the rising edge type.
+
+Example:
+
+ eccmgr: eccmgr@ffd08140 {
+ compatible = "altr,socfpga-ecc-manager";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ l2-ecc@ffd08140 {
+ compatible = "altr,socfpga-l2-ecc";
+ reg = <0xffd08140 0x4>;
+ interrupts = <0 36 1>, <0 37 1>;
+ };
+
+ ocram-ecc@ffd08144 {
+ compatible = "altr,socfpga-ocram-ecc";
+ reg = <0xffd08144 0x4>;
+ iram = <&ocram>;
+ interrupts = <0 178 1>, <0 179 1>;
+ };
+ };
diff --git a/dts/Bindings/arm/amlogic.txt b/dts/Bindings/arm/amlogic.txt
index 1dfee20..8a5122a 100644
--- a/dts/Bindings/arm/amlogic.txt
+++ b/dts/Bindings/arm/amlogic.txt
@@ -13,8 +13,15 @@ Boards with the Amlogic Meson8b SoC shall have the following properties:
Required root node property:
compatible: "amlogic,meson8b";
+Boards with the Amlogic Meson GXBaby SoC shall have the following properties:
+ Required root node property:
+ compatible: "amlogic,meson-gxbb";
+
Board compatible values:
- "geniatech,atv1200" (Meson6)
- "minix,neo-x8" (Meson8)
- "tronfy,mxq" (Meson8b)
- "hardkernel,odroid-c1" (Meson8b)
+ - "tronsmart,vega-s95-pro", "tronsmart,vega-s95" (Meson gxbb)
+ - "tronsmart,vega-s95-meta", "tronsmart,vega-s95" (Meson gxbb)
+ - "tronsmart,vega-s95-telos", "tronsmart,vega-s95" (Meson gxbb)
diff --git a/dts/Bindings/arm/arm-boards b/dts/Bindings/arm/arm-boards
index 1a70997..0226bc2 100644
--- a/dts/Bindings/arm/arm-boards
+++ b/dts/Bindings/arm/arm-boards
@@ -123,7 +123,9 @@ Required nodes:
- syscon: some subnode of the RealView SoC node must be a
system controller node pointing to the control registers,
- with the compatible string set to one of these tuples:
+ with the compatible string set to one of these:
+ "arm,realview-eb11mp-revb-syscon", "arm,realview-eb-syscon", "syscon"
+ "arm,realview-eb11mp-revc-syscon", "arm,realview-eb-syscon", "syscon"
"arm,realview-eb-syscon", "syscon"
"arm,realview-pb1176-syscon", "syscon"
"arm,realview-pb11mp-syscon", "syscon"
@@ -180,6 +182,7 @@ described under the RS1 memory mapping.
Required properties (in root node):
compatible = "arm,juno"; /* For Juno r0 board */
compatible = "arm,juno-r1"; /* For Juno r1 board */
+ compatible = "arm,juno-r2"; /* For Juno r2 board */
Required nodes:
The description for the board must include:
diff --git a/dts/Bindings/arm/axis.txt b/dts/Bindings/arm/axis.txt
new file mode 100644
index 0000000..ae345e1
--- /dev/null
+++ b/dts/Bindings/arm/axis.txt
@@ -0,0 +1,29 @@
+Axis Communications AB
+ARTPEC series SoC Device Tree Bindings
+
+ARTPEC-6 ARM SoC
+================
+
+Required root node properties:
+- compatible = "axis,artpec6";
+
+ARTPEC-6 System Controller
+--------------------------
+
+The ARTPEC-6 has a system controller with mixed functions controlling DMA, PCIe
+and resets.
+
+Required properties:
+- compatible: "axis,artpec6-syscon", "syscon"
+- reg: Address and length of the register bank.
+
+Example:
+ syscon {
+ compatible = "axis,artpec6-syscon", "syscon";
+ reg = <0xf8000000 0x48>;
+ };
+
+ARTPEC-6 Development board:
+---------------------------
+Required root node properties:
+- compatible = "axis,artpec6-dev-board", "axis,artpec6";
diff --git a/dts/Bindings/arm/bcm/brcm,vulcan-soc.txt b/dts/Bindings/arm/bcm/brcm,vulcan-soc.txt
new file mode 100644
index 0000000..223ed34
--- /dev/null
+++ b/dts/Bindings/arm/bcm/brcm,vulcan-soc.txt
@@ -0,0 +1,10 @@
+Broadcom Vulcan device tree bindings
+------------------------------------
+
+Boards with Broadcom Vulcan shall have the following root property:
+
+Broadcom Vulcan Evaluation Board:
+ compatible = "brcm,vulcan-eval", "brcm,vulcan-soc";
+
+Generic Vulcan board:
+ compatible = "brcm,vulcan-soc";
diff --git a/dts/Bindings/arm/cci.txt b/dts/Bindings/arm/cci.txt
index aef1d20..a1a5a7e 100644
--- a/dts/Bindings/arm/cci.txt
+++ b/dts/Bindings/arm/cci.txt
@@ -34,6 +34,7 @@ specific to ARM.
Definition: must contain one of the following:
"arm,cci-400"
"arm,cci-500"
+ "arm,cci-550"
- reg
Usage: required
@@ -101,6 +102,7 @@ specific to ARM.
"arm,cci-400-pmu" - DEPRECATED, permitted only where OS has
secure acces to CCI registers
"arm,cci-500-pmu,r0"
+ "arm,cci-550-pmu,r0"
- reg:
Usage: required
Value type: Integer cells. A register entry, expressed
diff --git a/dts/Bindings/arm/cpus.txt b/dts/Bindings/arm/cpus.txt
index ae9be07..ccc62f1 100644
--- a/dts/Bindings/arm/cpus.txt
+++ b/dts/Bindings/arm/cpus.txt
@@ -167,6 +167,7 @@ nodes to be present and contain the properties described below.
"arm,cortex-r5"
"arm,cortex-r7"
"brcm,brahma-b15"
+ "brcm,vulcan"
"cavium,thunder"
"faraday,fa526"
"intel,sa110"
@@ -178,6 +179,7 @@ nodes to be present and contain the properties described below.
"marvell,sheeva-v5"
"nvidia,tegra132-denver"
"qcom,krait"
+ "qcom,kryo"
"qcom,scorpion"
- enable-method
Value type: <stringlist>
@@ -250,7 +252,7 @@ nodes to be present and contain the properties described below.
Usage: optional
Value type: <prop-encoded-array>
Definition: A u32 value that represents the running time dynamic
- power coefficient in units of mW/MHz/uVolt^2. The
+ power coefficient in units of mW/MHz/uV^2. The
coefficient can either be calculated from power
measurements or derived by analysis.
diff --git a/dts/Bindings/arm/fw-cfg.txt b/dts/Bindings/arm/fw-cfg.txt
index 953fb64..fd54e1d 100644
--- a/dts/Bindings/arm/fw-cfg.txt
+++ b/dts/Bindings/arm/fw-cfg.txt
@@ -11,43 +11,9 @@ QEMU exposes the control and data register to ARM guests as memory mapped
registers; their location is communicated to the guest's UEFI firmware in the
DTB that QEMU places at the bottom of the guest's DRAM.
-The guest writes a selector value (a key) to the selector register, and then
-can read the corresponding data (produced by QEMU) via the data register. If
-the selected entry is writable, the guest can rewrite it through the data
-register.
+The authoritative guest-side hardware interface documentation to the fw_cfg
+device can be found in "docs/specs/fw_cfg.txt" in the QEMU source tree.
-The selector register takes keys in big endian byte order.
-
-The data register allows accesses with 8, 16, 32 and 64-bit width (only at
-offset 0 of the register). Accesses larger than a byte are interpreted as
-arrays, bundled together only for better performance. The bytes constituting
-such a word, in increasing address order, correspond to the bytes that would
-have been transferred by byte-wide accesses in chronological order.
-
-The interface allows guest firmware to download various parameters and blobs
-that affect how the firmware works and what tables it installs for the guest
-OS. For example, boot order of devices, ACPI tables, SMBIOS tables, kernel and
-initrd images for direct kernel booting, virtual machine UUID, SMP information,
-virtual NUMA topology, and so on.
-
-The authoritative registry of the valid selector values and their meanings is
-the QEMU source code; the structure of the data blobs corresponding to the
-individual key values is also defined in the QEMU source code.
-
-The presence of the registers can be verified by selecting the "signature" blob
-with key 0x0000, and reading four bytes from the data register. The returned
-signature is "QEMU".
-
-The outermost protocol (involving the write / read sequences of the control and
-data registers) is expected to be versioned, and/or described by feature bits.
-The interface revision / feature bitmap can be retrieved with key 0x0001. The
-blob to be read from the data register has size 4, and it is to be interpreted
-as a uint32_t value in little endian byte order. The current value
-(corresponding to the above outer protocol) is zero.
-
-The guest kernel is not expected to use these registers (although it is
-certainly allowed to); the device tree bindings are documented here because
-this is where device tree bindings reside in general.
Required properties:
diff --git a/dts/Bindings/arm/keystone/keystone.txt b/dts/Bindings/arm/keystone/keystone.txt
index 3090a8a..48f6703 100644
--- a/dts/Bindings/arm/keystone/keystone.txt
+++ b/dts/Bindings/arm/keystone/keystone.txt
@@ -22,6 +22,8 @@ SoCs:
compatible = "ti,k2l", "ti,keystone"
- Keystone 2 Edison
compatible = "ti,k2e", "ti,keystone"
+- K2G
+ compatible = "ti,k2g", "ti,keystone"
Boards:
- Keystone 2 Hawking/Kepler EVM
@@ -32,3 +34,6 @@ Boards:
- Keystone 2 Edison EVM
compatible = "ti,k2e-evm", "ti,k2e", "ti,keystone"
+
+- K2G EVM
+ compatible = "ti,k2g-evm", "ti,k2g", "ti-keystone"
diff --git a/dts/Bindings/arm/armada-370-xp-pmsu.txt b/dts/Bindings/arm/marvell/armada-370-xp-pmsu.txt
index 26799ef..26799ef 100644
--- a/dts/Bindings/arm/armada-370-xp-pmsu.txt
+++ b/dts/Bindings/arm/marvell/armada-370-xp-pmsu.txt
diff --git a/dts/Bindings/arm/armada-370-xp.txt b/dts/Bindings/arm/marvell/armada-370-xp.txt
index c6ed90e..c6ed90e 100644
--- a/dts/Bindings/arm/armada-370-xp.txt
+++ b/dts/Bindings/arm/marvell/armada-370-xp.txt
diff --git a/dts/Bindings/arm/armada-375.txt b/dts/Bindings/arm/marvell/armada-375.txt
index 867d0b8..867d0b8 100644
--- a/dts/Bindings/arm/armada-375.txt
+++ b/dts/Bindings/arm/marvell/armada-375.txt
diff --git a/dts/Bindings/arm/marvell/armada-37xx.txt b/dts/Bindings/arm/marvell/armada-37xx.txt
new file mode 100644
index 0000000..51336e5
--- /dev/null
+++ b/dts/Bindings/arm/marvell/armada-37xx.txt
@@ -0,0 +1,16 @@
+Marvell Armada 37xx Platforms Device Tree Bindings
+--------------------------------------------------
+
+Boards using a SoC of the Marvell Armada 37xx family must carry the
+following root node property:
+
+ - compatible: must contain "marvell,armada3710"
+
+In addition, boards using the Marvell Armada 3720 SoC shall have the
+following property before the previous one:
+
+ - compatible: must contain "marvell,armada3720"
+
+Example:
+
+compatible = "marvell,armada-3720-db", "marvell,armada3720", "marvell,armada3710";
diff --git a/dts/Bindings/arm/armada-380-mpcore-soc-ctrl.txt b/dts/Bindings/arm/marvell/armada-380-mpcore-soc-ctrl.txt
index 8781073..8781073 100644
--- a/dts/Bindings/arm/armada-380-mpcore-soc-ctrl.txt
+++ b/dts/Bindings/arm/marvell/armada-380-mpcore-soc-ctrl.txt
diff --git a/dts/Bindings/arm/armada-38x.txt b/dts/Bindings/arm/marvell/armada-38x.txt
index 202953f..202953f 100644
--- a/dts/Bindings/arm/armada-38x.txt
+++ b/dts/Bindings/arm/marvell/armada-38x.txt
diff --git a/dts/Bindings/arm/armada-39x.txt b/dts/Bindings/arm/marvell/armada-39x.txt
index 53d4ff9..53d4ff9 100644
--- a/dts/Bindings/arm/armada-39x.txt
+++ b/dts/Bindings/arm/marvell/armada-39x.txt
diff --git a/dts/Bindings/arm/marvell/armada-7k-8k.txt b/dts/Bindings/arm/marvell/armada-7k-8k.txt
new file mode 100644
index 0000000..df98a9c
--- /dev/null
+++ b/dts/Bindings/arm/marvell/armada-7k-8k.txt
@@ -0,0 +1,24 @@
+Marvell Armada 7K/8K Platforms Device Tree Bindings
+---------------------------------------------------
+
+Boards using a SoC of the Marvell Armada 7K or 8K families must carry
+the following root node property:
+
+ - compatible, with one of the following values:
+
+ - "marvell,armada7020", "marvell,armada-ap806-dual", "marvell,armada-ap806"
+ when the SoC being used is the Armada 7020
+
+ - "marvell,armada7040", "marvell,armada-ap806-quad", "marvell,armada-ap806"
+ when the SoC being used is the Armada 7040
+
+ - "marvell,armada8020", "marvell,armada-ap806-dual", "marvell,armada-ap806"
+ when the SoC being used is the Armada 8020
+
+ - "marvell,armada8040", "marvell,armada-ap806-quad", "marvell,armada-ap806"
+ when the SoC being used is the Armada 8040
+
+Example:
+
+compatible = "marvell,armada7040-db", "marvell,armada7040",
+ "marvell,armada-ap806-quad", "marvell,armada-ap806";
diff --git a/dts/Bindings/arm/armada-cpu-reset.txt b/dts/Bindings/arm/marvell/armada-cpu-reset.txt
index b63a7b6..b63a7b6 100644
--- a/dts/Bindings/arm/armada-cpu-reset.txt
+++ b/dts/Bindings/arm/marvell/armada-cpu-reset.txt
diff --git a/dts/Bindings/arm/coherency-fabric.txt b/dts/Bindings/arm/marvell/coherency-fabric.txt
index 9b5c3f6..9b5c3f6 100644
--- a/dts/Bindings/arm/coherency-fabric.txt
+++ b/dts/Bindings/arm/marvell/coherency-fabric.txt
diff --git a/dts/Bindings/arm/kirkwood.txt b/dts/Bindings/arm/marvell/kirkwood.txt
index 98cce9a..98cce9a 100644
--- a/dts/Bindings/arm/kirkwood.txt
+++ b/dts/Bindings/arm/marvell/kirkwood.txt
diff --git a/dts/Bindings/arm/marvell,berlin.txt b/dts/Bindings/arm/marvell/marvell,berlin.txt
index 3bab184..3bab184 100644
--- a/dts/Bindings/arm/marvell,berlin.txt
+++ b/dts/Bindings/arm/marvell/marvell,berlin.txt
diff --git a/dts/Bindings/arm/marvell,dove.txt b/dts/Bindings/arm/marvell/marvell,dove.txt
index aaaf64c..aaaf64c 100644
--- a/dts/Bindings/arm/marvell,dove.txt
+++ b/dts/Bindings/arm/marvell/marvell,dove.txt
diff --git a/dts/Bindings/arm/marvell,kirkwood.txt b/dts/Bindings/arm/marvell/marvell,kirkwood.txt
index ab0c9cd..7d28fe4 100644
--- a/dts/Bindings/arm/marvell,kirkwood.txt
+++ b/dts/Bindings/arm/marvell/marvell,kirkwood.txt
@@ -19,9 +19,12 @@ SoC. Currently known SoC compatibles are:
And in addition, the compatible shall be extended with the specific
board. Currently known boards are:
+"buffalo,linkstation-lsqvl"
+"buffalo,linkstation-lsvl"
+"buffalo,linkstation-lswsxl"
+"buffalo,linkstation-lswxl"
+"buffalo,linkstation-lswvl"
"buffalo,lschlv2"
-"buffalo,lswvl"
-"buffalo,lswxl"
"buffalo,lsxhl"
"buffalo,lsxl"
"cloudengines,pogo02"
diff --git a/dts/Bindings/arm/mvebu-cpu-config.txt b/dts/Bindings/arm/marvell/mvebu-cpu-config.txt
index 2cdcd71..2cdcd71 100644
--- a/dts/Bindings/arm/mvebu-cpu-config.txt
+++ b/dts/Bindings/arm/marvell/mvebu-cpu-config.txt
diff --git a/dts/Bindings/arm/mvebu-system-controller.txt b/dts/Bindings/arm/marvell/mvebu-system-controller.txt
index d24ab2e..d24ab2e 100644
--- a/dts/Bindings/arm/mvebu-system-controller.txt
+++ b/dts/Bindings/arm/marvell/mvebu-system-controller.txt
diff --git a/dts/Bindings/arm/mediatek.txt b/dts/Bindings/arm/mediatek.txt
index 54f43bc..d9c2a37 100644
--- a/dts/Bindings/arm/mediatek.txt
+++ b/dts/Bindings/arm/mediatek.txt
@@ -11,6 +11,7 @@ compatible: Must contain one of
"mediatek,mt6589"
"mediatek,mt6592"
"mediatek,mt6795"
+ "mediatek,mt7623"
"mediatek,mt8127"
"mediatek,mt8135"
"mediatek,mt8173"
@@ -33,6 +34,9 @@ Supported boards:
- Evaluation board for MT6795(Helio X10):
Required root node properties:
- compatible = "mediatek,mt6795-evb", "mediatek,mt6795";
+- Evaluation board for MT7623:
+ Required root node properties:
+ - compatible = "mediatek,mt7623-evb", "mediatek,mt7623";
- MTK mt8127 tablet moose EVB:
Required root node properties:
- compatible = "mediatek,mt8127-moose", "mediatek,mt8127";
diff --git a/dts/Bindings/arm/lpc32xx.txt b/dts/Bindings/arm/nxp/lpc32xx.txt
index 56ec8dd..56ec8dd 100644
--- a/dts/Bindings/arm/lpc32xx.txt
+++ b/dts/Bindings/arm/nxp/lpc32xx.txt
diff --git a/dts/Bindings/arm/omap/omap.txt b/dts/Bindings/arm/omap/omap.txt
index 66422d6..21e71a5 100644
--- a/dts/Bindings/arm/omap/omap.txt
+++ b/dts/Bindings/arm/omap/omap.txt
@@ -155,7 +155,7 @@ Boards:
compatible = "compulab,am437x-sbc-t43", "compulab,am437x-cm-t43", "ti,am4372", "ti,am43"
- AM43x EPOS EVM
- compatible = "ti,am43x-epos-evm", "ti,am4372", "ti,am43"
+ compatible = "ti,am43x-epos-evm", "ti,am43", "ti,am438x"
- AM437x GP EVM
compatible = "ti,am437x-gp-evm", "ti,am4372", "ti,am43"
diff --git a/dts/Bindings/arm/pmu.txt b/dts/Bindings/arm/pmu.txt
index 5651883..6eb73be 100644
--- a/dts/Bindings/arm/pmu.txt
+++ b/dts/Bindings/arm/pmu.txt
@@ -25,6 +25,7 @@ Required properties:
"qcom,scorpion-pmu"
"qcom,scorpion-mp-pmu"
"qcom,krait-pmu"
+ "cavium,thunder-pmu"
- interrupts : 1 combined interrupt or 1 per core. If the interrupt is a per-cpu
interrupt (PPI) then 1 interrupt should be specified.
@@ -46,6 +47,16 @@ Optional properties:
- qcom,no-pc-write : Indicates that this PMU doesn't support the 0xc and 0xd
events.
+- secure-reg-access : Indicates that the ARMv7 Secure Debug Enable Register
+ (SDER) is accessible. This will cause the driver to do
+ any setup required that is only possible in ARMv7 secure
+ state. If not present the ARMv7 SDER will not be touched,
+ which means the PMU may fail to operate unless external
+ code (bootloader or security monitor) has performed the
+ appropriate initialisation. Note that this property is
+ not valid for non-ARMv7 CPUs or ARMv7 CPUs booting Linux
+ in Non-secure state.
+
Example:
pmu {
diff --git a/dts/Bindings/arm/qcom.txt b/dts/Bindings/arm/qcom.txt
new file mode 100644
index 0000000..3e24518
--- /dev/null
+++ b/dts/Bindings/arm/qcom.txt
@@ -0,0 +1,51 @@
+QCOM device tree bindings
+-------------------------
+
+Some qcom based bootloaders identify the dtb blob based on a set of
+device properties like SoC and platform and revisions of those components.
+To support this scheme, we encode this information into the board compatible
+string.
+
+Each board must specify a top-level board compatible string with the following
+format:
+
+ compatible = "qcom,<SoC>[-<soc_version>][-<foundry_id>]-<board>[/<subtype>][-<board_version>]"
+
+The 'SoC' and 'board' elements are required. All other elements are optional.
+
+The 'SoC' element must be one of the following strings:
+
+ apq8016
+ apq8074
+ apq8084
+ apq8096
+ msm8916
+ msm8974
+ msm8996
+
+The 'board' element must be one of the following strings:
+
+ cdp
+ liquid
+ dragonboard
+ mtp
+ sbc
+
+The 'soc_version' and 'board_version' elements take the form of v<Major>.<Minor>
+where the minor number may be omitted when it's zero, i.e. v1.0 is the same
+as v1. If all versions of the 'board_version' elements match, then a
+wildcard '*' should be used, e.g. 'v*'.
+
+The 'foundry_id' and 'subtype' elements are one or more digits from 0 to 9.
+
+Examples:
+
+ "qcom,msm8916-v1-cdp-pm8916-v2.1"
+
+A CDP board with an msm8916 SoC, version 1 paired with a pm8916 PMIC of version
+2.1.
+
+ "qcom,apq8074-v2.0-2-dragonboard/1-v0.1"
+
+A dragonboard board v0.1 of subtype 1 with an apq8074 SoC version 2, made in
+foundry 2.
diff --git a/dts/Bindings/arm/sunxi.txt b/dts/Bindings/arm/sunxi.txt
index bb9b0fa..7e79fcc 100644
--- a/dts/Bindings/arm/sunxi.txt
+++ b/dts/Bindings/arm/sunxi.txt
@@ -11,5 +11,6 @@ using one of the following compatible strings:
allwinner,sun7i-a20
allwinner,sun8i-a23
allwinner,sun8i-a33
+ allwinner,sun8i-a83t
allwinner,sun8i-h3
allwinner,sun9i-a80