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authorSascha Hauer <s.hauer@pengutronix.de>2019-06-05 00:06:34 +0200
committerSascha Hauer <s.hauer@pengutronix.de>2019-06-11 09:11:15 +0200
commitfffb86c826e95679abf0b5d8b90794c39218182e (patch)
tree6e3e2ba255349895dcf3f119a7c10faf3977ce35 /dts/Bindings/arm
parent796af3473b8222bcd89aa63e9886c355a6baf95d (diff)
downloadbarebox-fffb86c826e95679abf0b5d8b90794c39218182e.tar.gz
barebox-fffb86c826e95679abf0b5d8b90794c39218182e.tar.xz
dts: update to v5.2-rc2
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings/arm')
-rw-r--r--dts/Bindings/arm/arm-boards4
-rw-r--r--dts/Bindings/arm/cpu-capacity.txt12
-rw-r--r--dts/Bindings/arm/omap/crossbar.txt2
3 files changed, 9 insertions, 9 deletions
diff --git a/dts/Bindings/arm/arm-boards b/dts/Bindings/arm/arm-boards
index b6e810c278..abff8d834a 100644
--- a/dts/Bindings/arm/arm-boards
+++ b/dts/Bindings/arm/arm-boards
@@ -216,7 +216,7 @@ Example:
#size-cells = <0>;
A57_0: cpu@0 {
- compatible = "arm,cortex-a57","arm,armv8";
+ compatible = "arm,cortex-a57";
reg = <0x0 0x0>;
device_type = "cpu";
enable-method = "psci";
@@ -225,7 +225,7 @@ Example:
.....
A53_0: cpu@100 {
- compatible = "arm,cortex-a53","arm,armv8";
+ compatible = "arm,cortex-a53";
reg = <0x0 0x100>;
device_type = "cpu";
enable-method = "psci";
diff --git a/dts/Bindings/arm/cpu-capacity.txt b/dts/Bindings/arm/cpu-capacity.txt
index 96fa46cb13..380e21c5fc 100644
--- a/dts/Bindings/arm/cpu-capacity.txt
+++ b/dts/Bindings/arm/cpu-capacity.txt
@@ -118,7 +118,7 @@ cpus {
};
A57_0: cpu@0 {
- compatible = "arm,cortex-a57","arm,armv8";
+ compatible = "arm,cortex-a57";
reg = <0x0 0x0>;
device_type = "cpu";
enable-method = "psci";
@@ -129,7 +129,7 @@ cpus {
};
A57_1: cpu@1 {
- compatible = "arm,cortex-a57","arm,armv8";
+ compatible = "arm,cortex-a57";
reg = <0x0 0x1>;
device_type = "cpu";
enable-method = "psci";
@@ -140,7 +140,7 @@ cpus {
};
A53_0: cpu@100 {
- compatible = "arm,cortex-a53","arm,armv8";
+ compatible = "arm,cortex-a53";
reg = <0x0 0x100>;
device_type = "cpu";
enable-method = "psci";
@@ -151,7 +151,7 @@ cpus {
};
A53_1: cpu@101 {
- compatible = "arm,cortex-a53","arm,armv8";
+ compatible = "arm,cortex-a53";
reg = <0x0 0x101>;
device_type = "cpu";
enable-method = "psci";
@@ -162,7 +162,7 @@ cpus {
};
A53_2: cpu@102 {
- compatible = "arm,cortex-a53","arm,armv8";
+ compatible = "arm,cortex-a53";
reg = <0x0 0x102>;
device_type = "cpu";
enable-method = "psci";
@@ -173,7 +173,7 @@ cpus {
};
A53_3: cpu@103 {
- compatible = "arm,cortex-a53","arm,armv8";
+ compatible = "arm,cortex-a53";
reg = <0x0 0x103>;
device_type = "cpu";
enable-method = "psci";
diff --git a/dts/Bindings/arm/omap/crossbar.txt b/dts/Bindings/arm/omap/crossbar.txt
index 4cd5d873fc..a43e4c7aba 100644
--- a/dts/Bindings/arm/omap/crossbar.txt
+++ b/dts/Bindings/arm/omap/crossbar.txt
@@ -41,7 +41,7 @@ Examples:
Consumer:
========
See Documentation/devicetree/bindings/interrupt-controller/interrupts.txt and
-Documentation/devicetree/bindings/interrupt-controller/arm,gic.txt for
+Documentation/devicetree/bindings/interrupt-controller/arm,gic.yaml for
further details.
An interrupt consumer on an SoC using crossbar will use: