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| author | Sascha Hauer <s.hauer@pengutronix.de> | 2019-12-19 05:46:54 +0100 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2019-12-19 05:46:54 +0100 |
| commit | 574eed3f6fcf056aa4c9e46c4b5224e3f7844d8d (patch) | |
| tree | 3fbe9ed379bc0d6c536860845e85a4ede4b36bbc /dts/Bindings/board | |
| parent | 179dedbc6d85d7ea7c8013513b364a75f32943e8 (diff) | |
| download | barebox-574eed3f6fcf056aa4c9e46c4b5224e3f7844d8d.tar.gz barebox-574eed3f6fcf056aa4c9e46c4b5224e3f7844d8d.tar.xz | |
dts: update to v5.5-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings/board')
| -rw-r--r-- | dts/Bindings/board/fsl-board.txt | 30 |
1 files changed, 0 insertions, 30 deletions
diff --git a/dts/Bindings/board/fsl-board.txt b/dts/Bindings/board/fsl-board.txt index eb52f6b351..9cde570159 100644 --- a/dts/Bindings/board/fsl-board.txt +++ b/dts/Bindings/board/fsl-board.txt @@ -47,36 +47,6 @@ Example (LS2080A-RDB): reg = <0x3 0 0x10000>; }; -* Freescale BCSR GPIO banks - -Some BCSR registers act as simple GPIO controllers, each such -register can be represented by the gpio-controller node. - -Required properities: -- compatible : Should be "fsl,<board>-bcsr-gpio". -- reg : Should contain the address and the length of the GPIO bank - register. -- #gpio-cells : Should be two. The first cell is the pin number and the - second cell is used to specify optional parameters (currently unused). -- gpio-controller : Marks the port as GPIO controller. - -Example: - - bcsr@1,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8360mds-bcsr"; - reg = <1 0 0x8000>; - ranges = <0 1 0 0x8000>; - - bcsr13: gpio-controller@d { - #gpio-cells = <2>; - compatible = "fsl,mpc8360mds-bcsr-gpio"; - reg = <0xd 1>; - gpio-controller; - }; - }; - * Freescale on-board FPGA connected on I2C bus Some Freescale boards like BSC9132QDS have on board FPGA connected on |