diff options
author | Sascha Hauer <s.hauer@pengutronix.de> | 2015-12-08 07:35:17 +0100 |
---|---|---|
committer | Sascha Hauer <s.hauer@pengutronix.de> | 2015-12-10 08:48:40 +0100 |
commit | 6e6d9a2ff045f09d5a03e876becea5e6a1dabe90 (patch) | |
tree | bcf5e71df4472e374d03cc15ca22b4f841d9c73d /dts/Bindings/bus | |
parent | 8e2fd5380a4fd7cee428513dc8eab068912b49f1 (diff) | |
download | barebox-6e6d9a2ff045f09d5a03e876becea5e6a1dabe90.tar.gz barebox-6e6d9a2ff045f09d5a03e876becea5e6a1dabe90.tar.xz |
dts: update to v4.4-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings/bus')
-rw-r--r-- | dts/Bindings/bus/sunxi-rsb.txt | 47 |
1 files changed, 47 insertions, 0 deletions
diff --git a/dts/Bindings/bus/sunxi-rsb.txt b/dts/Bindings/bus/sunxi-rsb.txt new file mode 100644 index 0000000000..3dd28343b6 --- /dev/null +++ b/dts/Bindings/bus/sunxi-rsb.txt @@ -0,0 +1,47 @@ +Allwinner Reduced Serial Bus (RSB) controller + +The RSB controller found on later Allwinner SoCs is an SMBus like 2 wire +serial bus with 1 master and up to 15 slaves. It is represented by a node +for the controller itself, and child nodes representing the slave devices. + +Required properties : + + - reg : Offset and length of the register set for the controller. + - compatible : Shall be "allwinner,sun8i-a23-rsb". + - interrupts : The interrupt line associated to the RSB controller. + - clocks : The gate clk associated to the RSB controller. + - resets : The reset line associated to the RSB controller. + - #address-cells : shall be 1 + - #size-cells : shall be 0 + +Optional properties : + + - clock-frequency : Desired RSB bus clock frequency in Hz. Maximum is 20MHz. + If not set this defaults to 3MHz. + +Child nodes: + +An RSB controller node can contain zero or more child nodes representing +slave devices on the bus. Child 'reg' properties should contain the slave +device's hardware address. The hardware address is hardwired in the device, +which can normally be found in the datasheet. + +Example: + + rsb@01f03400 { + compatible = "allwinner,sun8i-a23-rsb"; + reg = <0x01f03400 0x400>; + interrupts = <0 39 4>; + clocks = <&apb0_gates 3>; + clock-frequency = <3000000>; + resets = <&apb0_rst 3>; + #address-cells = <1>; + #size-cells = <0>; + + pmic@3e3 { + compatible = "..."; + reg = <0x3e3>; + + /* ... */ + }; + }; |