diff options
| author | Sascha Hauer <s.hauer@pengutronix.de> | 2018-06-21 13:44:30 +0200 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2018-06-22 08:16:13 +0200 |
| commit | e4067b75fb6ca83a58b2c342a0b3ee12e1223c4e (patch) | |
| tree | be013bf46292f4696ac776bc91c1cf35b7adab24 /dts/Bindings/bus | |
| parent | fe040e0977fab29216f5039e8f9b04e6dbec859a (diff) | |
| download | barebox-e4067b75fb6ca83a58b2c342a0b3ee12e1223c4e.tar.gz barebox-e4067b75fb6ca83a58b2c342a0b3ee12e1223c4e.tar.xz | |
dts: update to v4.18-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings/bus')
| -rw-r--r-- | dts/Bindings/bus/ti-sysc.txt | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/dts/Bindings/bus/ti-sysc.txt b/dts/Bindings/bus/ti-sysc.txt index 2957a9ae29..d8ed5b780e 100644 --- a/dts/Bindings/bus/ti-sysc.txt +++ b/dts/Bindings/bus/ti-sysc.txt @@ -79,7 +79,11 @@ Optional properties: mode as for example omap4 L4_CFG_CLKCTRL - clock-names should contain at least "fck", and optionally also "ick" - depending on the SoC and the interconnect target module + depending on the SoC and the interconnect target module, + some interconnect target modules also need additional + optional clocks that can be specified as listed in TRM + for the related CLKCTRL register bits 8 to 15 such as + "dbclk" or "clk32k" depending on their role - ti,hwmods optional TI interconnect module name to use legacy hwmod platform data |