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| author | Sascha Hauer <s.hauer@pengutronix.de> | 2018-05-08 08:14:56 +0200 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2018-05-08 08:14:56 +0200 |
| commit | 6b85c20d46812bdbc062b863261c3e5100e30556 (patch) | |
| tree | e067c9889eaf55d5e793b05a14000276f2669e9f /dts/Bindings/clock/renesas,cpg-mssr.txt | |
| parent | 9d8c00bdf7c1e8b614a797f0a15fa45bf6387224 (diff) | |
| download | barebox-6b85c20d46812bdbc062b863261c3e5100e30556.tar.gz barebox-6b85c20d46812bdbc062b863261c3e5100e30556.tar.xz | |
dts: update to v4.17-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings/clock/renesas,cpg-mssr.txt')
| -rw-r--r-- | dts/Bindings/clock/renesas,cpg-mssr.txt | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/dts/Bindings/clock/renesas,cpg-mssr.txt b/dts/Bindings/clock/renesas,cpg-mssr.txt index f1890d0777..773a522634 100644 --- a/dts/Bindings/clock/renesas,cpg-mssr.txt +++ b/dts/Bindings/clock/renesas,cpg-mssr.txt @@ -22,7 +22,9 @@ Required Properties: - "renesas,r8a7794-cpg-mssr" for the r8a7794 SoC (R-Car E2) - "renesas,r8a7795-cpg-mssr" for the r8a7795 SoC (R-Car H3) - "renesas,r8a7796-cpg-mssr" for the r8a7796 SoC (R-Car M3-W) + - "renesas,r8a77965-cpg-mssr" for the r8a77965 SoC (R-Car M3-N) - "renesas,r8a77970-cpg-mssr" for the r8a77970 SoC (R-Car V3M) + - "renesas,r8a77980-cpg-mssr" for the r8a77980 SoC (R-Car V3H) - "renesas,r8a77995-cpg-mssr" for the r8a77995 SoC (R-Car D3) - reg: Base address and length of the memory resource used by the CPG/MSSR @@ -32,8 +34,8 @@ Required Properties: clock-names - clock-names: List of external parent clock names. Valid names are: - "extal" (r8a7743, r8a7745, r8a7790, r8a7791, r8a7792, r8a7793, r8a7794, - r8a7795, r8a7796, r8a77970, r8a77995) - - "extalr" (r8a7795, r8a7796, r8a77970) + r8a7795, r8a7796, r8a77965, r8a77970, r8a77980, r8a77995) + - "extalr" (r8a7795, r8a7796, r8a77965, r8a77970, r8a77980) - "usb_extal" (r8a7743, r8a7745, r8a7790, r8a7791, r8a7793, r8a7794) - #clock-cells: Must be 2 |