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| author | Sascha Hauer <s.hauer@pengutronix.de> | 2015-07-08 14:44:21 +0200 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2015-07-08 14:44:21 +0200 |
| commit | 87360e3dd42bb627a9f2611f961728c0789e1c21 (patch) | |
| tree | afefc88c862d9feafb0cdb075badeb8d32d8efd2 /dts/Bindings/clock/renesas,cpg-mstp-clocks.txt | |
| parent | 80936d6aaeea1b10ce4eb81c54eece2f55f8e209 (diff) | |
| download | barebox-87360e3dd42bb627a9f2611f961728c0789e1c21.tar.gz barebox-87360e3dd42bb627a9f2611f961728c0789e1c21.tar.xz | |
dts: update to v4.2-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings/clock/renesas,cpg-mstp-clocks.txt')
| -rw-r--r-- | dts/Bindings/clock/renesas,cpg-mstp-clocks.txt | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/dts/Bindings/clock/renesas,cpg-mstp-clocks.txt b/dts/Bindings/clock/renesas,cpg-mstp-clocks.txt index 0a80fa70ca..16ed181551 100644 --- a/dts/Bindings/clock/renesas,cpg-mstp-clocks.txt +++ b/dts/Bindings/clock/renesas,cpg-mstp-clocks.txt @@ -13,12 +13,14 @@ Required Properties: - "renesas,r7s72100-mstp-clocks" for R7S72100 (RZ) MSTP gate clocks - "renesas,r8a73a4-mstp-clocks" for R8A73A4 (R-Mobile APE6) MSTP gate clocks - "renesas,r8a7740-mstp-clocks" for R8A7740 (R-Mobile A1) MSTP gate clocks + - "renesas,r8a7778-mstp-clocks" for R8A7778 (R-Car M1) MSTP gate clocks - "renesas,r8a7779-mstp-clocks" for R8A7779 (R-Car H1) MSTP gate clocks - "renesas,r8a7790-mstp-clocks" for R8A7790 (R-Car H2) MSTP gate clocks - - "renesas,r8a7791-mstp-clocks" for R8A7791 (R-Car M2) MSTP gate clocks + - "renesas,r8a7791-mstp-clocks" for R8A7791 (R-Car M2-W) MSTP gate clocks + - "renesas,r8a7793-mstp-clocks" for R8A7793 (R-Car M2-N) MSTP gate clocks - "renesas,r8a7794-mstp-clocks" for R8A7794 (R-Car E2) MSTP gate clocks - "renesas,sh73a0-mstp-clocks" for SH73A0 (SH-MobileAG5) MSTP gate clocks - - "renesas,cpg-mstp-clock" for generic MSTP gate clocks + and "renesas,cpg-mstp-clocks" as a fallback. - reg: Base address and length of the I/O mapped registers used by the MSTP clocks. The first register is the clock control register and is mandatory. The second register is the clock status register and is optional when not |