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authorSascha Hauer <s.hauer@pengutronix.de>2015-12-08 07:35:17 +0100
committerSascha Hauer <s.hauer@pengutronix.de>2015-12-10 08:48:40 +0100
commit6e6d9a2ff045f09d5a03e876becea5e6a1dabe90 (patch)
treebcf5e71df4472e374d03cc15ca22b4f841d9c73d /dts/Bindings/clock/st/st,clkgen-pll.txt
parent8e2fd5380a4fd7cee428513dc8eab068912b49f1 (diff)
downloadbarebox-6e6d9a2ff045f09d5a03e876becea5e6a1dabe90.tar.gz
barebox-6e6d9a2ff045f09d5a03e876becea5e6a1dabe90.tar.xz
dts: update to v4.4-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings/clock/st/st,clkgen-pll.txt')
-rw-r--r--dts/Bindings/clock/st/st,clkgen-pll.txt1
1 files changed, 1 insertions, 0 deletions
diff --git a/dts/Bindings/clock/st/st,clkgen-pll.txt b/dts/Bindings/clock/st/st,clkgen-pll.txt
index d8b168ebd5..844b3a0976 100644
--- a/dts/Bindings/clock/st/st,clkgen-pll.txt
+++ b/dts/Bindings/clock/st/st,clkgen-pll.txt
@@ -23,6 +23,7 @@ Required properties:
"st,stih407-plls-c32-a9", "st,clkgen-plls-c32"
"sst,plls-c32-cx_0", "st,clkgen-plls-c32"
"sst,plls-c32-cx_1", "st,clkgen-plls-c32"
+ "st,stih418-plls-c28-a9", "st,clkgen-plls-c32"
"st,stih415-gpu-pll-c32", "st,clkgengpu-pll-c32"
"st,stih416-gpu-pll-c32", "st,clkgengpu-pll-c32"