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author | Sascha Hauer <s.hauer@pengutronix.de> | 2019-08-19 08:56:20 +0200 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2019-08-19 08:56:20 +0200 |
commit | 6940ba22c66ac1c713500027bf5f6832442a1410 (patch) | |
tree | a460f01b9807e1c17206a40dbc94b6f54167cf29 /dts/Bindings/cpufreq | |
parent | e66a790177410d7433e6672d97bb0b54455ba669 (diff) | |
download | barebox-6940ba22c66ac1c713500027bf5f6832442a1410.tar.gz barebox-6940ba22c66ac1c713500027bf5f6832442a1410.tar.xz |
dts: update to v5.3-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings/cpufreq')
-rw-r--r-- | dts/Bindings/cpufreq/imx-cpufreq-dt.txt | 37 |
1 files changed, 37 insertions, 0 deletions
diff --git a/dts/Bindings/cpufreq/imx-cpufreq-dt.txt b/dts/Bindings/cpufreq/imx-cpufreq-dt.txt new file mode 100644 index 0000000000..87bff5add3 --- /dev/null +++ b/dts/Bindings/cpufreq/imx-cpufreq-dt.txt @@ -0,0 +1,37 @@ +i.MX CPUFreq-DT OPP bindings +================================ + +Certain i.MX SoCs support different OPPs depending on the "market segment" and +"speed grading" value which are written in fuses. These bits are combined with +the opp-supported-hw values for each OPP to check if the OPP is allowed. + +Required properties: +-------------------- + +For each opp entry in 'operating-points-v2' table: +- opp-supported-hw: Two bitmaps indicating: + - Supported speed grade mask + - Supported market segment mask + 0: Consumer + 1: Extended Consumer + 2: Industrial + 3: Automotive + +Example: +-------- + +opp_table { + compatible = "operating-points-v2"; + opp-1000000000 { + opp-hz = /bits/ 64 <1000000000>; + /* grade >= 0, consumer only */ + opp-supported-hw = <0xf>, <0x3>; + }; + + opp-1300000000 { + opp-hz = /bits/ 64 <1300000000>; + opp-microvolt = <1000000>; + /* grade >= 1, all segments */ + opp-supported-hw = <0xe>, <0x7>; + }; +} |