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author | Sascha Hauer <s.hauer@pengutronix.de> | 2017-03-10 08:56:15 +0100 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2017-03-10 08:56:15 +0100 |
commit | 957bb6b6bcebc4c36f5f284dfb58d489e81016c6 (patch) | |
tree | 593d098617017987daaf8ce339e0eb29ea09fdde /dts/Bindings/crypto/mediatek-crypto.txt | |
parent | cc2392cf4f2d5208be427e9ffdeafba192f05cbe (diff) | |
download | barebox-957bb6b6bcebc4c36f5f284dfb58d489e81016c6.tar.gz barebox-957bb6b6bcebc4c36f5f284dfb58d489e81016c6.tar.xz |
dts: update to v4.11-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings/crypto/mediatek-crypto.txt')
-rw-r--r-- | dts/Bindings/crypto/mediatek-crypto.txt | 27 |
1 files changed, 27 insertions, 0 deletions
diff --git a/dts/Bindings/crypto/mediatek-crypto.txt b/dts/Bindings/crypto/mediatek-crypto.txt new file mode 100644 index 0000000000..c204725e58 --- /dev/null +++ b/dts/Bindings/crypto/mediatek-crypto.txt @@ -0,0 +1,27 @@ +MediaTek cryptographic accelerators + +Required properties: +- compatible: Should be "mediatek,eip97-crypto" +- reg: Address and length of the register set for the device +- interrupts: Should contain the five crypto engines interrupts in numeric + order. These are global system and four descriptor rings. +- clocks: the clock used by the core +- clock-names: the names of the clock listed in the clocks property. These are + "ethif", "cryp" +- power-domains: Must contain a reference to the PM domain. + + +Example: + crypto: crypto@1b240000 { + compatible = "mediatek,eip97-crypto"; + reg = <0 0x1b240000 0 0x20000>; + interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_LOW>, + <GIC_SPI 83 IRQ_TYPE_LEVEL_LOW>, + <GIC_SPI 84 IRQ_TYPE_LEVEL_LOW>, + <GIC_SPI 91 IRQ_TYPE_LEVEL_LOW>, + <GIC_SPI 97 IRQ_TYPE_LEVEL_LOW>; + clocks = <&topckgen CLK_TOP_ETHIF_SEL>, + <ðsys CLK_ETHSYS_CRYPTO>; + clock-names = "ethif","cryp"; + power-domains = <&scpsys MT2701_POWER_DOMAIN_ETH>; + }; |