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authorSascha Hauer <s.hauer@pengutronix.de>2014-04-25 11:22:32 +0200
committerSascha Hauer <s.hauer@pengutronix.de>2014-04-28 09:08:46 +0200
commit00ce25c6dcdae5582ae4be37147ab33678adc995 (patch)
tree41c93102ae304a61738c31353e3cb5336ef0b297 /dts/Bindings/crypto/picochip-spacc.txt
parent0af79fbb6779921d3f1962773adb7fb57d3c89d4 (diff)
downloadbarebox-00ce25c6dcdae5582ae4be37147ab33678adc995.tar.gz
barebox-00ce25c6dcdae5582ae4be37147ab33678adc995.tar.xz
Add devicetree source files as of Linux-3.15-rc2
This adds the Linux dts files to barebox. The dts files are generated from Ian Campbells device-tree-rebasing.git: git://xenbits.xen.org/people/ianc/device-tree-rebasing.git The dts are found in dts/ in the barebox repository and will be updated from upstream regularly, probably for each upstream -rc. To keep the synchronization with upstream easy no changes to the original files are allowed under dts/. Instead changes to upstream dts files will be done using overlays in arch/$ARCH/dts/. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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+Picochip picoXcell SPAcc (Security Protocol Accelerator) bindings
+
+Picochip picoXcell devices contain crypto offload engines that may be used for
+IPSEC and femtocell layer 2 ciphering.
+
+Required properties:
+ - compatible : "picochip,spacc-ipsec" for the IPSEC offload engine
+ "picochip,spacc-l2" for the femtocell layer 2 ciphering engine.
+ - reg : Offset and length of the register set for this device
+ - interrupt-parent : The interrupt controller that controls the SPAcc
+ interrupt.
+ - interrupts : The interrupt line from the SPAcc.
+ - ref-clock : The input clock that drives the SPAcc.
+
+Example SPAcc node:
+
+spacc@10000 {
+ compatible = "picochip,spacc-ipsec";
+ reg = <0x100000 0x10000>;
+ interrupt-parent = <&vic0>;
+ interrupts = <24>;
+ ref-clock = <&ipsec_clk>, "ref";
+};