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author | Sascha Hauer <s.hauer@pengutronix.de> | 2022-01-27 11:22:53 +0100 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2022-01-28 15:31:59 +0100 |
commit | 5f3e773ca4830daf71c7b5eee0c6b1dfe4d09c08 (patch) | |
tree | 0634f20e5f75f3d44242af47eebd9ea1ce0163f6 /dts/Bindings/crypto | |
parent | db35548372eaee835fbf9bae68c08362ba59d49d (diff) | |
download | barebox-5f3e773ca4830daf71c7b5eee0c6b1dfe4d09c08.tar.gz barebox-5f3e773ca4830daf71c7b5eee0c6b1dfe4d09c08.tar.xz |
dts: update to v5.17-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings/crypto')
-rw-r--r-- | dts/Bindings/crypto/allwinner,sun4i-a10-crypto.yaml | 10 | ||||
-rw-r--r-- | dts/Bindings/crypto/qcom,prng.txt | 19 | ||||
-rw-r--r-- | dts/Bindings/crypto/qcom,prng.yaml | 43 |
3 files changed, 53 insertions, 19 deletions
diff --git a/dts/Bindings/crypto/allwinner,sun4i-a10-crypto.yaml b/dts/Bindings/crypto/allwinner,sun4i-a10-crypto.yaml index 0429fb774f..dedc99e34e 100644 --- a/dts/Bindings/crypto/allwinner,sun4i-a10-crypto.yaml +++ b/dts/Bindings/crypto/allwinner,sun4i-a10-crypto.yaml @@ -44,6 +44,16 @@ properties: - const: ahb - const: mod + dmas: + items: + - description: RX DMA Channel + - description: TX DMA Channel + + dma-names: + items: + - const: rx + - const: tx + resets: maxItems: 1 diff --git a/dts/Bindings/crypto/qcom,prng.txt b/dts/Bindings/crypto/qcom,prng.txt deleted file mode 100644 index 7ee0e9eac9..0000000000 --- a/dts/Bindings/crypto/qcom,prng.txt +++ /dev/null @@ -1,19 +0,0 @@ -Qualcomm MSM pseudo random number generator. - -Required properties: - -- compatible : should be "qcom,prng" for 8916 etc - : should be "qcom,prng-ee" for 8996 and later using EE - (Execution Environment) slice of prng -- reg : specifies base physical address and size of the registers map -- clocks : phandle to clock-controller plus clock-specifier pair -- clock-names : "core" clocks all registers, FIFO and circuits in PRNG IP block - -Example: - - rng@f9bff000 { - compatible = "qcom,prng"; - reg = <0xf9bff000 0x200>; - clocks = <&clock GCC_PRNG_AHB_CLK>; - clock-names = "core"; - }; diff --git a/dts/Bindings/crypto/qcom,prng.yaml b/dts/Bindings/crypto/qcom,prng.yaml new file mode 100644 index 0000000000..bb42f4588b --- /dev/null +++ b/dts/Bindings/crypto/qcom,prng.yaml @@ -0,0 +1,43 @@ +# SPDX-License-Identifier: GPL-2.0-only +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/crypto/qcom,prng.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Pseudo Random Number Generator + +maintainers: + - Vinod Koul <vkoul@kernel.org> + +properties: + compatible: + enum: + - qcom,prng # 8916 etc. + - qcom,prng-ee # 8996 and later using EE + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + clock-names: + items: + - const: core + +required: + - compatible + - reg + - clocks + - clock-names + +additionalProperties: false + +examples: + - | + rng@f9bff000 { + compatible = "qcom,prng"; + reg = <0xf9bff000 0x200>; + clocks = <&clk 125>; + clock-names = "core"; + }; |