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authorLucas Stach <l.stach@pengutronix.de>2017-07-31 20:03:05 +0200
committerLucas Stach <l.stach@pengutronix.de>2017-07-31 20:03:05 +0200
commitd14b844b08635c717fb52a294ed8d6872e260315 (patch)
tree18607dcdd29688b2fa9528f79423183a68e9898d /dts/Bindings/crypto
parent858b797e529e26c19bfa893fdb37ed67ff7a6006 (diff)
downloadbarebox-d14b844b08635c717fb52a294ed8d6872e260315.tar.gz
barebox-d14b844b08635c717fb52a294ed8d6872e260315.tar.xz
dts: update to v4.13-rc2
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Diffstat (limited to 'dts/Bindings/crypto')
-rw-r--r--dts/Bindings/crypto/fsl-sec4.txt4
-rw-r--r--dts/Bindings/crypto/fsl-sec6.txt4
-rw-r--r--dts/Bindings/crypto/inside-secure-safexcel.txt29
-rw-r--r--dts/Bindings/crypto/mediatek-crypto.txt8
4 files changed, 36 insertions, 9 deletions
diff --git a/dts/Bindings/crypto/fsl-sec4.txt b/dts/Bindings/crypto/fsl-sec4.txt
index 10a425f451..7aef0eae58 100644
--- a/dts/Bindings/crypto/fsl-sec4.txt
+++ b/dts/Bindings/crypto/fsl-sec4.txt
@@ -118,8 +118,8 @@ PROPERTIES
Definition: A list of clock name strings in the same order as the
clocks property.
- Note: All other standard properties (see the ePAPR) are allowed
- but are optional.
+ Note: All other standard properties (see the Devicetree Specification)
+ are allowed but are optional.
EXAMPLE
diff --git a/dts/Bindings/crypto/fsl-sec6.txt b/dts/Bindings/crypto/fsl-sec6.txt
index baf8a3c1b4..73b0eb950b 100644
--- a/dts/Bindings/crypto/fsl-sec6.txt
+++ b/dts/Bindings/crypto/fsl-sec6.txt
@@ -55,8 +55,8 @@ PROPERTIES
triplet that includes the child address, parent address, &
length.
- Note: All other standard properties (see the ePAPR) are allowed
- but are optional.
+ Note: All other standard properties (see the Devicetree Specification)
+ are allowed but are optional.
EXAMPLE
crypto@a0000 {
diff --git a/dts/Bindings/crypto/inside-secure-safexcel.txt b/dts/Bindings/crypto/inside-secure-safexcel.txt
new file mode 100644
index 0000000000..f69773f425
--- /dev/null
+++ b/dts/Bindings/crypto/inside-secure-safexcel.txt
@@ -0,0 +1,29 @@
+Inside Secure SafeXcel cryptographic engine
+
+Required properties:
+- compatible: Should be "inside-secure,safexcel-eip197".
+- reg: Base physical address of the engine and length of memory mapped region.
+- interrupts: Interrupt numbers for the rings and engine.
+- interrupt-names: Should be "ring0", "ring1", "ring2", "ring3", "eip", "mem".
+
+Optional properties:
+- clocks: Reference to the crypto engine clock.
+- dma-mask: The address mask limitation. Defaults to 64.
+
+Example:
+
+ crypto: crypto@800000 {
+ compatible = "inside-secure,safexcel-eip197";
+ reg = <0x800000 0x200000>;
+ interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "mem", "ring0", "ring1", "ring2", "ring3",
+ "eip";
+ clocks = <&cpm_syscon0 1 26>;
+ dma-mask = <0xff 0xffffffff>;
+ status = "disabled";
+ };
diff --git a/dts/Bindings/crypto/mediatek-crypto.txt b/dts/Bindings/crypto/mediatek-crypto.txt
index c204725e58..450da3661c 100644
--- a/dts/Bindings/crypto/mediatek-crypto.txt
+++ b/dts/Bindings/crypto/mediatek-crypto.txt
@@ -6,8 +6,7 @@ Required properties:
- interrupts: Should contain the five crypto engines interrupts in numeric
order. These are global system and four descriptor rings.
- clocks: the clock used by the core
-- clock-names: the names of the clock listed in the clocks property. These are
- "ethif", "cryp"
+- clock-names: Must contain "cryp".
- power-domains: Must contain a reference to the PM domain.
@@ -20,8 +19,7 @@ Example:
<GIC_SPI 84 IRQ_TYPE_LEVEL_LOW>,
<GIC_SPI 91 IRQ_TYPE_LEVEL_LOW>,
<GIC_SPI 97 IRQ_TYPE_LEVEL_LOW>;
- clocks = <&topckgen CLK_TOP_ETHIF_SEL>,
- <&ethsys CLK_ETHSYS_CRYPTO>;
- clock-names = "ethif","cryp";
+ clocks = <&ethsys CLK_ETHSYS_CRYPTO>;
+ clock-names = "cryp";
power-domains = <&scpsys MT2701_POWER_DOMAIN_ETH>;
};