diff options
| author | Sascha Hauer <s.hauer@pengutronix.de> | 2020-08-17 08:16:38 +0200 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2020-08-17 09:51:44 +0200 |
| commit | 0c2e2b7d8fd795c24abc7bfd3752eb3e366155eb (patch) | |
| tree | 21cddf4b49891b7df21cbe5e5dd358d4e44e031d /dts/Bindings/devfreq | |
| parent | 8ef08db9ad225acbf7326493cc586bb14fd917f5 (diff) | |
| download | barebox-0c2e2b7d8fd795c24abc7bfd3752eb3e366155eb.tar.gz barebox-0c2e2b7d8fd795c24abc7bfd3752eb3e366155eb.tar.xz | |
dts: update to v5.9-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings/devfreq')
| -rw-r--r-- | dts/Bindings/devfreq/rk3399_dmc.txt | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/dts/Bindings/devfreq/rk3399_dmc.txt b/dts/Bindings/devfreq/rk3399_dmc.txt index 0ec68141f8..a10d1f6d85 100644 --- a/dts/Bindings/devfreq/rk3399_dmc.txt +++ b/dts/Bindings/devfreq/rk3399_dmc.txt @@ -18,6 +18,8 @@ Optional properties: format depends on the interrupt controller. It should be a DCF interrupt. When DDR DVFS finishes a DCF interrupt is triggered. +- rockchip,pmu: Phandle to the syscon managing the "PMU general register + files". Following properties relate to DDR timing: |