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authorSascha Hauer <s.hauer@pengutronix.de>2018-06-21 13:44:30 +0200
committerSascha Hauer <s.hauer@pengutronix.de>2018-06-22 08:16:13 +0200
commite4067b75fb6ca83a58b2c342a0b3ee12e1223c4e (patch)
treebe013bf46292f4696ac776bc91c1cf35b7adab24 /dts/Bindings/fpga
parentfe040e0977fab29216f5039e8f9b04e6dbec859a (diff)
downloadbarebox-e4067b75fb6ca83a58b2c342a0b3ee12e1223c4e.tar.gz
dts: update to v4.18-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings/fpga')
-rw-r--r--dts/Bindings/fpga/lattice-machxo2-spi.txt29
1 files changed, 29 insertions, 0 deletions
diff --git a/dts/Bindings/fpga/lattice-machxo2-spi.txt b/dts/Bindings/fpga/lattice-machxo2-spi.txt
new file mode 100644
index 0000000..a8c362e
--- /dev/null
+++ b/dts/Bindings/fpga/lattice-machxo2-spi.txt
@@ -0,0 +1,29 @@
+Lattice MachXO2 Slave SPI FPGA Manager
+
+Lattice MachXO2 FPGAs support a method of loading the bitstream over
+'slave SPI' interface.
+
+See 'MachXO2ProgrammingandConfigurationUsageGuide.pdf' on www.latticesemi.com
+
+Required properties:
+- compatible: should contain "lattice,machxo2-slave-spi"
+- reg: spi chip select of the FPGA
+
+Example for full FPGA configuration:
+
+ fpga-region0 {
+ compatible = "fpga-region";
+ fpga-mgr = <&fpga_mgr_spi>;
+ #address-cells = <0x1>;
+ #size-cells = <0x1>;
+ };
+
+ spi1: spi@2000 {
+ ...
+
+ fpga_mgr_spi: fpga-mgr@0 {
+ compatible = "lattice,machxo2-slave-spi";
+ spi-max-frequency = <8000000>;
+ reg = <0>;
+ };
+ };