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| author | Sascha Hauer <s.hauer@pengutronix.de> | 2014-09-01 09:47:17 +0200 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2014-09-02 11:01:29 +0200 |
| commit | a595ff6eea05b919567f96d71e7e2c7b6236b8ac (patch) | |
| tree | 2d7cea529b6a06be744116e29e8a97b0c8de1981 /dts/Bindings/fuse | |
| parent | 7955f4315187665690f51e20698d4c12c68e008f (diff) | |
| download | barebox-a595ff6eea05b919567f96d71e7e2c7b6236b8ac.tar.gz barebox-a595ff6eea05b919567f96d71e7e2c7b6236b8ac.tar.xz | |
dts: update to v3.17-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings/fuse')
| -rw-r--r-- | dts/Bindings/fuse/nvidia,tegra20-fuse.txt | 40 |
1 files changed, 40 insertions, 0 deletions
diff --git a/dts/Bindings/fuse/nvidia,tegra20-fuse.txt b/dts/Bindings/fuse/nvidia,tegra20-fuse.txt new file mode 100644 index 0000000000..d8c98c7614 --- /dev/null +++ b/dts/Bindings/fuse/nvidia,tegra20-fuse.txt @@ -0,0 +1,40 @@ +NVIDIA Tegra20/Tegra30/Tegr114/Tegra124 fuse block. + +Required properties: +- compatible : should be: + "nvidia,tegra20-efuse" + "nvidia,tegra30-efuse" + "nvidia,tegra114-efuse" + "nvidia,tegra124-efuse" + Details: + nvidia,tegra20-efuse: Tegra20 requires using APB DMA to read the fuse data + due to a hardware bug. Tegra20 also lacks certain information which is + available in later generations such as fab code, lot code, wafer id,.. + nvidia,tegra30-efuse, nvidia,tegra114-efuse and nvidia,tegra124-efuse: + The differences between these SoCs are the size of the efuse array, + the location of the spare (OEM programmable) bits and the location of + the speedo data. +- reg: Should contain 1 entry: the entry gives the physical address and length + of the fuse registers. +- clocks: Must contain an entry for each entry in clock-names. + See ../clocks/clock-bindings.txt for details. +- clock-names: Must include the following entries: + - fuse +- resets: Must contain an entry for each entry in reset-names. + See ../reset/reset.txt for details. +- reset-names: Must include the following entries: + - fuse + +Example: + + fuse@7000f800 { + compatible = "nvidia,tegra20-efuse"; + reg = <0x7000F800 0x400>, + <0x70000000 0x400>; + clocks = <&tegra_car TEGRA20_CLK_FUSE>; + clock-names = "fuse"; + resets = <&tegra_car 39>; + reset-names = "fuse"; + }; + + |