path: root/dts/Bindings/i2c/i2c-designware.txt
diff options
authorSascha Hauer <>2019-06-05 00:06:30 +0200
committerSascha Hauer <>2019-06-11 09:11:11 +0200
commit796af3473b8222bcd89aa63e9886c355a6baf95d (patch)
treead357b2756bda409b46747faaaf57a0ffd003c9c /dts/Bindings/i2c/i2c-designware.txt
parent649b9ebcf53d697277bcdb01334dbcd563a33aa8 (diff)
dts: update to v5.2-rc1
Signed-off-by: Sascha Hauer <>
Diffstat (limited to 'dts/Bindings/i2c/i2c-designware.txt')
1 files changed, 9 insertions, 0 deletions
diff --git a/dts/Bindings/i2c/i2c-designware.txt b/dts/Bindings/i2c/i2c-designware.txt
index 3e4bcc2..08be4d3 100644
--- a/dts/Bindings/i2c/i2c-designware.txt
+++ b/dts/Bindings/i2c/i2c-designware.txt
@@ -6,12 +6,21 @@ Required properties :
or "mscc,ocelot-i2c" with "snps,designware-i2c" for fallback
- reg : Offset and length of the register set for the device
- interrupts : <IRQ> where IRQ is the interrupt number.
+ - clocks : phandles for the clocks, see the description of clock-names below.
+ The phandle for the "ic_clk" clock is required. The phandle for the "pclk"
+ clock is optional. If a single clock is specified but no clock-name, it is
+ the "ic_clk" clock. If both clocks are listed, the "ic_clk" must be first.
Recommended properties :
- clock-frequency : desired I2C bus clock frequency in Hz.
Optional properties :
+ - clock-names : Contains the names of the clocks:
+ "ic_clk", for the core clock used to generate the external I2C clock.
+ "pclk", the interface clock, required for register access.
- reg : for "mscc,ocelot-i2c", a second register set to configure the SDA hold
time, named ICPU_CFG:TWI_DELAY in the datasheet.