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authorSascha Hauer <s.hauer@pengutronix.de>2019-02-11 10:47:59 +0100
committerSascha Hauer <s.hauer@pengutronix.de>2019-02-11 10:47:59 +0100
commit21945eda6edef30bf8c91a7a3ccb677e17b311d0 (patch)
treea390e7d46601215f7576602f9fa5af03ed5b4279 /dts/Bindings/interrupt-controller/arm,gic-v3.txt
parente1483104aa781cee58130d1f803315ae365a2ffe (diff)
downloadbarebox-21945eda6edef30bf8c91a7a3ccb677e17b311d0.tar.gz
dts: update to v5.0-rc3
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings/interrupt-controller/arm,gic-v3.txt')
-rw-r--r--dts/Bindings/interrupt-controller/arm,gic-v3.txt2
1 files changed, 1 insertions, 1 deletions
diff --git a/dts/Bindings/interrupt-controller/arm,gic-v3.txt b/dts/Bindings/interrupt-controller/arm,gic-v3.txt
index b83bb82..a3be529 100644
--- a/dts/Bindings/interrupt-controller/arm,gic-v3.txt
+++ b/dts/Bindings/interrupt-controller/arm,gic-v3.txt
@@ -78,7 +78,7 @@ Sub-nodes:
PPI affinity can be expressed as a single "ppi-partitions" node,
containing a set of sub-nodes, each with the following property:
- affinity: Should be a list of phandles to CPU nodes (as described in
-Documentation/devicetree/bindings/arm/cpus.txt).
+ Documentation/devicetree/bindings/arm/cpus.yaml).
GICv3 has one or more Interrupt Translation Services (ITS) that are
used to route Message Signalled Interrupts (MSI) to the CPUs.