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| author | Sascha Hauer <s.hauer@pengutronix.de> | 2019-06-05 00:06:34 +0200 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2019-06-11 09:11:15 +0200 |
| commit | fffb86c826e95679abf0b5d8b90794c39218182e (patch) | |
| tree | 6e3e2ba255349895dcf3f119a7c10faf3977ce35 /dts/Bindings/interrupt-controller/marvell,odmi-controller.txt | |
| parent | 796af3473b8222bcd89aa63e9886c355a6baf95d (diff) | |
| download | barebox-fffb86c826e95679abf0b5d8b90794c39218182e.tar.gz barebox-fffb86c826e95679abf0b5d8b90794c39218182e.tar.xz | |
dts: update to v5.2-rc2
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings/interrupt-controller/marvell,odmi-controller.txt')
| -rw-r--r-- | dts/Bindings/interrupt-controller/marvell,odmi-controller.txt | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/dts/Bindings/interrupt-controller/marvell,odmi-controller.txt b/dts/Bindings/interrupt-controller/marvell,odmi-controller.txt index 930fb462fd..0ebfc952cb 100644 --- a/dts/Bindings/interrupt-controller/marvell,odmi-controller.txt +++ b/dts/Bindings/interrupt-controller/marvell,odmi-controller.txt @@ -23,7 +23,7 @@ Required properties: - marvell,spi-base : List of GIC base SPI interrupts, one for each ODMI frame. Those SPI interrupts are 0-based, i.e marvell,spi-base = <128> will use SPI #96. - See Documentation/devicetree/bindings/interrupt-controller/arm,gic.txt + See Documentation/devicetree/bindings/interrupt-controller/arm,gic.yaml for details about the GIC Device Tree binding. Example: |