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author | Sascha Hauer <s.hauer@pengutronix.de> | 2019-12-19 05:46:54 +0100 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2019-12-19 05:46:54 +0100 |
commit | 574eed3f6fcf056aa4c9e46c4b5224e3f7844d8d (patch) | |
tree | 3fbe9ed379bc0d6c536860845e85a4ede4b36bbc /dts/Bindings/interrupt-controller/mrvl,intc.txt | |
parent | 179dedbc6d85d7ea7c8013513b364a75f32943e8 (diff) | |
download | barebox-574eed3f6fcf056aa4c9e46c4b5224e3f7844d8d.tar.gz barebox-574eed3f6fcf056aa4c9e46c4b5224e3f7844d8d.tar.xz |
dts: update to v5.5-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings/interrupt-controller/mrvl,intc.txt')
-rw-r--r-- | dts/Bindings/interrupt-controller/mrvl,intc.txt | 14 |
1 files changed, 9 insertions, 5 deletions
diff --git a/dts/Bindings/interrupt-controller/mrvl,intc.txt b/dts/Bindings/interrupt-controller/mrvl,intc.txt index 608fee15a4..a0ed02725a 100644 --- a/dts/Bindings/interrupt-controller/mrvl,intc.txt +++ b/dts/Bindings/interrupt-controller/mrvl,intc.txt @@ -1,13 +1,17 @@ * Marvell MMP Interrupt controller Required properties: -- compatible : Should be "mrvl,mmp-intc", "mrvl,mmp2-intc" or - "mrvl,mmp2-mux-intc" +- compatible : Should be + "mrvl,mmp-intc" on Marvel MMP, + "mrvl,mmp2-intc" along with "mrvl,mmp2-mux-intc" on MMP2 or + "marvell,mmp3-intc" with "mrvl,mmp2-mux-intc" on MMP3 - reg : Address and length of the register set of the interrupt controller. If the interrupt controller is intc, address and length means the range - of the whole interrupt controller. If the interrupt controller is mux-intc, - address and length means one register. Since address of mux-intc is in the - range of intc. mux-intc is secondary interrupt controller. + of the whole interrupt controller. The "marvell,mmp3-intc" controller + also has a secondary range for the second CPU core. If the interrupt + controller is mux-intc, address and length means one register. Since + address of mux-intc is in the range of intc. mux-intc is secondary + interrupt controller. - reg-names : Name of the register set of the interrupt controller. It's only required in mux-intc interrupt controller. - interrupts : Should be the port interrupt shared by mux interrupts. It's |