path: root/dts/Bindings/interrupt-controller/technologic,ts4800.txt
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authorSascha Hauer <>2016-02-03 10:25:36 +0100
committerSascha Hauer <>2016-02-04 08:40:36 +0100
commit0ff58575c9d66f660886387c2e68d8c5c724e87b (patch)
tree4a889d1478da83ae46db96f5c049872cdb90eeb6 /dts/Bindings/interrupt-controller/technologic,ts4800.txt
parenta0da52f83c36a81984e0fca4b75d522b955df267 (diff)
dts: update to v4.5-rc1
Signed-off-by: Sascha Hauer <>
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+TS-4800 FPGA interrupt controller
+TS-4800 FPGA has an internal interrupt controller. When one of the
+interrupts is triggered, the SoC is notified, usually using a GPIO as
+parent interrupt source.
+Required properties:
+- compatible: should be "technologic,ts4800-irqc"
+- interrupt-controller: identifies the node as an interrupt controller
+- reg: physical base address of the controller and length of memory mapped
+ region
+- #interrupt-cells: specifies the number of cells needed to encode an interrupt
+ source, should be 1.
+- interrupt-parent: phandle to the parent interrupt controller this one is
+ cascaded from
+- interrupts: specifies the interrupt line in the interrupt-parent controller