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author | Sascha Hauer <s.hauer@pengutronix.de> | 2015-12-08 07:33:36 +0100 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2015-12-10 08:48:39 +0100 |
commit | a05d5c206c91b17eb13ab9631d93e0a9b6fb92f8 (patch) | |
tree | 69bb9a750c3f22308887a30b37e946b2738e33d4 /dts/Bindings/iommu | |
parent | 48c682bcb09e2073d7eb07b4ce2ffbbf20d02d59 (diff) | |
download | barebox-a05d5c206c91b17eb13ab9631d93e0a9b6fb92f8.tar.gz barebox-a05d5c206c91b17eb13ab9631d93e0a9b6fb92f8.tar.xz |
dts: update to v4.3-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings/iommu')
-rw-r--r-- | dts/Bindings/iommu/arm,smmu.txt | 6 | ||||
-rw-r--r-- | dts/Bindings/iommu/ti,omap-iommu.txt | 6 |
2 files changed, 12 insertions, 0 deletions
diff --git a/dts/Bindings/iommu/arm,smmu.txt b/dts/Bindings/iommu/arm,smmu.txt index 06760503a8..718074501f 100644 --- a/dts/Bindings/iommu/arm,smmu.txt +++ b/dts/Bindings/iommu/arm,smmu.txt @@ -43,6 +43,12 @@ conditions. ** System MMU optional properties: +- dma-coherent : Present if page table walks made by the SMMU are + cache coherent with the CPU. + + NOTE: this only applies to the SMMU itself, not + masters connected upstream of the SMMU. + - calxeda,smmu-secure-config-access : Enable proper handling of buggy implementations that always use secure access to SMMU configuration registers. In this case non-secure diff --git a/dts/Bindings/iommu/ti,omap-iommu.txt b/dts/Bindings/iommu/ti,omap-iommu.txt index 42531dc387..869699925f 100644 --- a/dts/Bindings/iommu/ti,omap-iommu.txt +++ b/dts/Bindings/iommu/ti,omap-iommu.txt @@ -8,6 +8,11 @@ Required properties: - ti,hwmods : Name of the hwmod associated with the IOMMU instance - reg : Address space for the configuration registers - interrupts : Interrupt specifier for the IOMMU instance +- #iommu-cells : Should be 0. OMAP IOMMUs are all "single-master" devices, + and needs no additional data in the pargs specifier. Please + also refer to the generic bindings document for more info + on this property, + Documentation/devicetree/bindings/iommu/iommu.txt Optional properties: - ti,#tlb-entries : Number of entries in the translation look-aside buffer. @@ -18,6 +23,7 @@ Optional properties: Example: /* OMAP3 ISP MMU */ mmu_isp: mmu@480bd400 { + #iommu-cells = <0>; compatible = "ti,omap2-iommu"; reg = <0x480bd400 0x80>; interrupts = <24>; |