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authorSascha Hauer <s.hauer@pengutronix.de>2020-03-18 07:17:44 +0100
committerSascha Hauer <s.hauer@pengutronix.de>2020-03-18 07:17:44 +0100
commit2d4582eca529cd8f69928045bd5b50b0541b8847 (patch)
tree9878afdb728fef871002a5e29eaf410e196a2dd7 /dts/Bindings/memory-controllers/nvidia,tegra124-emc.yaml
parentc1aa78fbdef068d73610acc62c7724aff6bfceb6 (diff)
downloadbarebox-2d4582eca529cd8f69928045bd5b50b0541b8847.tar.gz
barebox-2d4582eca529cd8f69928045bd5b50b0541b8847.tar.xz
dts: update to v5.6-rc3
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings/memory-controllers/nvidia,tegra124-emc.yaml')
-rw-r--r--dts/Bindings/memory-controllers/nvidia,tegra124-emc.yaml20
1 files changed, 12 insertions, 8 deletions
diff --git a/dts/Bindings/memory-controllers/nvidia,tegra124-emc.yaml b/dts/Bindings/memory-controllers/nvidia,tegra124-emc.yaml
index dd1843489a..3e0a8a92d6 100644
--- a/dts/Bindings/memory-controllers/nvidia,tegra124-emc.yaml
+++ b/dts/Bindings/memory-controllers/nvidia,tegra124-emc.yaml
@@ -347,6 +347,7 @@ examples:
interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
#iommu-cells = <1>;
+ #reset-cells = <1>;
};
external-memory-controller@7001b000 {
@@ -363,20 +364,23 @@ examples:
timing-0 {
clock-frequency = <12750000>;
- nvidia,emc-zcal-cnt-long = <0x00000042>;
- nvidia,emc-auto-cal-interval = <0x001fffff>;
- nvidia,emc-ctt-term-ctrl = <0x00000802>;
- nvidia,emc-cfg = <0x73240000>;
- nvidia,emc-cfg-2 = <0x000008c5>;
- nvidia,emc-sel-dpd-ctrl = <0x00040128>;
- nvidia,emc-bgbias-ctl0 = <0x00000008>;
nvidia,emc-auto-cal-config = <0xa1430000>;
nvidia,emc-auto-cal-config2 = <0x00000000>;
nvidia,emc-auto-cal-config3 = <0x00000000>;
- nvidia,emc-mode-reset = <0x80001221>;
+ nvidia,emc-auto-cal-interval = <0x001fffff>;
+ nvidia,emc-bgbias-ctl0 = <0x00000008>;
+ nvidia,emc-cfg = <0x73240000>;
+ nvidia,emc-cfg-2 = <0x000008c5>;
+ nvidia,emc-ctt-term-ctrl = <0x00000802>;
nvidia,emc-mode-1 = <0x80100003>;
nvidia,emc-mode-2 = <0x80200008>;
nvidia,emc-mode-4 = <0x00000000>;
+ nvidia,emc-mode-reset = <0x80001221>;
+ nvidia,emc-mrs-wait-cnt = <0x000e000e>;
+ nvidia,emc-sel-dpd-ctrl = <0x00040128>;
+ nvidia,emc-xm2dqspadctrl2 = <0x0130b118>;
+ nvidia,emc-zcal-cnt-long = <0x00000042>;
+ nvidia,emc-zcal-interval = <0x00000000>;
nvidia,emc-configuration = <
0x00000000 /* EMC_RC */