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author | Sascha Hauer <s.hauer@pengutronix.de> | 2017-01-10 08:26:15 +0100 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2017-01-10 08:48:45 +0100 |
commit | a40531fb3c11dc4ee8cca43c91b471da1fd3c1ab (patch) | |
tree | 35f886d87a77df7bac8a587a04647691db541a2e /dts/Bindings/memory-controllers/ti-da8xx-ddrctl.txt | |
parent | 81462901ce3d677ce318150f7027e2ce1cf97c41 (diff) | |
download | barebox-a40531fb3c11dc4ee8cca43c91b471da1fd3c1ab.tar.gz barebox-a40531fb3c11dc4ee8cca43c91b471da1fd3c1ab.tar.xz |
dts: update to v4.10-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings/memory-controllers/ti-da8xx-ddrctl.txt')
-rw-r--r-- | dts/Bindings/memory-controllers/ti-da8xx-ddrctl.txt | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/dts/Bindings/memory-controllers/ti-da8xx-ddrctl.txt b/dts/Bindings/memory-controllers/ti-da8xx-ddrctl.txt new file mode 100644 index 0000000000..ec1dd408d5 --- /dev/null +++ b/dts/Bindings/memory-controllers/ti-da8xx-ddrctl.txt @@ -0,0 +1,20 @@ +* Device tree bindings for Texas Instruments da8xx DDR2/mDDR memory controller + +The DDR2/mDDR memory controller present on Texas Instruments da8xx SoCs features +a set of registers which allow to tweak the controller's behavior. + +Documentation: +OMAP-L138 (DA850) - http://www.ti.com/lit/ug/spruh82c/spruh82c.pdf + +Required properties: + +- compatible: "ti,da850-ddr-controller" - for da850 SoC based boards +- reg: a tuple containing the base address of the memory + controller and the size of the memory area to map + +Example for da850 shown below. + +ddrctl { + compatible = "ti,da850-ddr-controller"; + reg = <0xb0000000 0xe8>; +}; |