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author | Sascha Hauer <s.hauer@pengutronix.de> | 2022-08-24 08:46:04 +0200 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2022-08-25 15:39:39 +0200 |
commit | eddd8312948329e28f00a6f1ca52b3e7f3c330ee (patch) | |
tree | 1b4ef77f92f72af55f853e09be1789a4206fbcb6 /dts/Bindings/memory-controllers | |
parent | eed776a50f486d4c1951da32a30d3fd1588ac6e2 (diff) | |
download | barebox-eddd8312948329e28f00a6f1ca52b3e7f3c330ee.tar.gz barebox-eddd8312948329e28f00a6f1ca52b3e7f3c330ee.tar.xz |
dts: update to v6.0-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings/memory-controllers')
-rw-r--r-- | dts/Bindings/memory-controllers/canaan,k210-sram.yaml | 52 | ||||
-rw-r--r-- | dts/Bindings/memory-controllers/mediatek,smi-common.yaml | 1 | ||||
-rw-r--r-- | dts/Bindings/memory-controllers/mediatek,smi-larb.yaml | 1 |
3 files changed, 54 insertions, 0 deletions
diff --git a/dts/Bindings/memory-controllers/canaan,k210-sram.yaml b/dts/Bindings/memory-controllers/canaan,k210-sram.yaml new file mode 100644 index 0000000000..f81fb866e3 --- /dev/null +++ b/dts/Bindings/memory-controllers/canaan,k210-sram.yaml @@ -0,0 +1,52 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/memory-controllers/canaan,k210-sram.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Canaan K210 SRAM memory controller + +description: + The Canaan K210 SRAM memory controller is responsible for the system's 8 MiB + of SRAM. The controller is initialised by the bootloader, which configures + its clocks, before OS bringup. + +maintainers: + - Conor Dooley <conor@kernel.org> + +properties: + compatible: + enum: + - canaan,k210-sram + + clocks: + minItems: 1 + items: + - description: sram0 clock + - description: sram1 clock + - description: aisram clock + + clock-names: + minItems: 1 + items: + - const: sram0 + - const: sram1 + - const: aisram + +required: + - compatible + - clocks + - clock-names + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/k210-clk.h> + memory-controller { + compatible = "canaan,k210-sram"; + clocks = <&sysclk K210_CLK_SRAM0>, + <&sysclk K210_CLK_SRAM1>, + <&sysclk K210_CLK_AI>; + clock-names = "sram0", "sram1", "aisram"; + }; diff --git a/dts/Bindings/memory-controllers/mediatek,smi-common.yaml b/dts/Bindings/memory-controllers/mediatek,smi-common.yaml index a98b359bf9..71bc5cefb4 100644 --- a/dts/Bindings/memory-controllers/mediatek,smi-common.yaml +++ b/dts/Bindings/memory-controllers/mediatek,smi-common.yaml @@ -32,6 +32,7 @@ properties: - mediatek,mt2701-smi-common - mediatek,mt2712-smi-common - mediatek,mt6779-smi-common + - mediatek,mt6795-smi-common - mediatek,mt8167-smi-common - mediatek,mt8173-smi-common - mediatek,mt8183-smi-common diff --git a/dts/Bindings/memory-controllers/mediatek,smi-larb.yaml b/dts/Bindings/memory-controllers/mediatek,smi-larb.yaml index c886681f62..59dcd16366 100644 --- a/dts/Bindings/memory-controllers/mediatek,smi-larb.yaml +++ b/dts/Bindings/memory-controllers/mediatek,smi-larb.yaml @@ -20,6 +20,7 @@ properties: - mediatek,mt2701-smi-larb - mediatek,mt2712-smi-larb - mediatek,mt6779-smi-larb + - mediatek,mt6795-smi-larb - mediatek,mt8167-smi-larb - mediatek,mt8173-smi-larb - mediatek,mt8183-smi-larb |