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authorSascha Hauer <s.hauer@pengutronix.de>2022-10-18 11:24:12 +0200
committerSascha Hauer <s.hauer@pengutronix.de>2022-10-20 08:41:39 +0200
commit32e2176ba05083b66b7585d4ca81bcb5c5d72f84 (patch)
tree51b8628d96eb6415b11e2875dc6158f695af6573 /dts/Bindings/mfd/aspeed-scu.txt
parent044294bdbee9e7ef8ffc5c3a9ef7841a09a84ff7 (diff)
downloadbarebox-32e2176ba05083b66b7585d4ca81bcb5c5d72f84.tar.gz
barebox-32e2176ba05083b66b7585d4ca81bcb5c5d72f84.tar.xz
dts: update to v6.1-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings/mfd/aspeed-scu.txt')
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diff --git a/dts/Bindings/mfd/aspeed-scu.txt b/dts/Bindings/mfd/aspeed-scu.txt
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-The Aspeed System Control Unit manages the global behaviour of the SoC,
-configuring elements such as clocks, pinmux, and reset.
-
-Required properties:
-- compatible: One of:
- "aspeed,ast2400-scu", "syscon", "simple-mfd"
- "aspeed,ast2500-scu", "syscon", "simple-mfd"
-
-- reg: contains the offset and length of the SCU memory region
-- #clock-cells: should be set to <1> - the system controller is also a
- clock provider
-- #reset-cells: should be set to <1> - the system controller is also a
- reset line provider
-
-Example:
-
-syscon: syscon@1e6e2000 {
- compatible = "aspeed,ast2400-scu", "syscon", "simple-mfd";
- reg = <0x1e6e2000 0x1a8>;
- #clock-cells = <1>;
- #reset-cells = <1>;
-};
-
-Silicon ID
------------------
-
-Families have unique hardware silicon identifiers within the SoC.
-
-Required properties:
-
- - compatible: "aspeed,silicon-id" or:
- "aspeed,ast2400-silicon-id" or
- "aspeed,ast2500-silicon-id" or
- "aspeed,ast2600-silicon-id"
-
- - reg: offset and length of the silicon id information
- optionally, a second offset and length describes the unique chip id
-
- The reg should be the unique silicon id register, and
- not backwards compatible one in eg. the 2600.
-
-Example:
-
-
-silicon-id@7c {
- compatible = "aspeed,ast2500-silicon-id", "aspeed,silicon-id";
- reg = <0x7c 0x4 0x150 0x8>;
-};