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authorSascha Hauer <s.hauer@pengutronix.de>2020-11-09 12:38:26 +0100
committerSascha Hauer <s.hauer@pengutronix.de>2020-11-09 13:42:10 +0100
commit119c632f12509eab4bc58daf629c4b16fffcedca (patch)
tree34366b3095d957178b46be47f628a3926ad35ac3 /dts/Bindings/mfd/rohm,bd71847-pmic.yaml
parent89b766c63f94b5fe94db75a6f197c9e6c0f9da7e (diff)
downloadbarebox-119c632f12509eab4bc58daf629c4b16fffcedca.tar.gz
barebox-119c632f12509eab4bc58daf629c4b16fffcedca.tar.xz
dts: update to v5.10-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings/mfd/rohm,bd71847-pmic.yaml')
-rw-r--r--dts/Bindings/mfd/rohm,bd71847-pmic.yaml9
1 files changed, 7 insertions, 2 deletions
diff --git a/dts/Bindings/mfd/rohm,bd71847-pmic.yaml b/dts/Bindings/mfd/rohm,bd71847-pmic.yaml
index 77bcca2d41..5d531051a1 100644
--- a/dts/Bindings/mfd/rohm,bd71847-pmic.yaml
+++ b/dts/Bindings/mfd/rohm,bd71847-pmic.yaml
@@ -38,6 +38,9 @@ properties:
"#clock-cells":
const: 0
+ clock-output-names:
+ maxItems: 1
+
# The BD71847 abd BD71850 support two different HW states as reset target
# states. States are called as SNVS and READY. At READY state all the PMIC
# power outputs go down and OTP is reload. At the SNVS state all other logic
@@ -116,12 +119,14 @@ required:
- compatible
- reg
- interrupts
- - clocks
- - "#clock-cells"
- regulators
additionalProperties: false
+dependencies:
+ '#clock-cells': [clocks]
+ clocks: ['#clock-cells']
+
examples:
- |
#include <dt-bindings/interrupt-controller/irq.h>