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authorSascha Hauer <s.hauer@pengutronix.de>2018-02-27 09:40:19 +0100
committerSascha Hauer <s.hauer@pengutronix.de>2018-03-01 14:29:51 +0100
commita9c5f6b9ec883ee9dafd6d393600acc6fd263043 (patch)
tree35621cff332a0c95509b04b2e4170f0eda1f0ecf /dts/Bindings/mfd
parent5ba0e42cb24afdf59d48930daf495c148312fc67 (diff)
downloadbarebox-a9c5f6b9ec883ee9dafd6d393600acc6fd263043.tar.gz
dts: update to v4.16-rc1
Also includeded: ARM: dts: am33xx: do not delete no longer existing clocks Several clocks are removed from the am33xx dts files with v4.16-rc1. Remove the corresponding /delete-node/ directives aswell to avoid dtc breakage. Also included: ARM: dts: imx6qdl: SolidRun: Fix upstream include Upstream dts file way renamed, so change include name accordingly. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings/mfd')
-rw-r--r--dts/Bindings/mfd/atmel-tcb.txt56
-rw-r--r--dts/Bindings/mfd/cros-ec.txt2
-rw-r--r--dts/Bindings/mfd/mc13xxx.txt2
-rw-r--r--dts/Bindings/mfd/syscon.txt8
4 files changed, 66 insertions, 2 deletions
diff --git a/dts/Bindings/mfd/atmel-tcb.txt b/dts/Bindings/mfd/atmel-tcb.txt
new file mode 100644
index 0000000..c4a83e3
--- /dev/null
+++ b/dts/Bindings/mfd/atmel-tcb.txt
@@ -0,0 +1,56 @@
+* Device tree bindings for Atmel Timer Counter Blocks
+- compatible: Should be "atmel,<chip>-tcb", "simple-mfd", "syscon".
+ <chip> can be "at91rm9200" or "at91sam9x5"
+- reg: Should contain registers location and length
+- #address-cells: has to be 1
+- #size-cells: has to be 0
+- interrupts: Should contain all interrupts for the TC block
+ Note that you can specify several interrupt cells if the TC
+ block has one interrupt per channel.
+- clock-names: tuple listing input clock names.
+ Required elements: "t0_clk", "slow_clk"
+ Optional elements: "t1_clk", "t2_clk"
+- clocks: phandles to input clocks.
+
+The TCB can expose multiple subdevices:
+ * a timer
+ - compatible: Should be "atmel,tcb-timer"
+ - reg: Should contain the TCB channels to be used. If the
+ counter width is 16 bits (at91rm9200-tcb), two consecutive
+ channels are needed. Else, only one channel will be used.
+
+Examples:
+
+One interrupt per TC block:
+ tcb0: timer@fff7c000 {
+ compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0xfff7c000 0x100>;
+ interrupts = <18 4>;
+ clocks = <&tcb0_clk>, <&clk32k>;
+ clock-names = "t0_clk", "slow_clk";
+
+ timer@0 {
+ compatible = "atmel,tcb-timer";
+ reg = <0>, <1>;
+ };
+
+ timer@2 {
+ compatible = "atmel,tcb-timer";
+ reg = <2>;
+ };
+ };
+
+One interrupt per TC channel in a TC block:
+ tcb1: timer@fffdc000 {
+ compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0xfffdc000 0x100>;
+ interrupts = <26 4>, <27 4>, <28 4>;
+ clocks = <&tcb1_clk>, <&clk32k>;
+ clock-names = "t0_clk", "slow_clk";
+ };
+
+
diff --git a/dts/Bindings/mfd/cros-ec.txt b/dts/Bindings/mfd/cros-ec.txt
index 136e0c2..6245c9b 100644
--- a/dts/Bindings/mfd/cros-ec.txt
+++ b/dts/Bindings/mfd/cros-ec.txt
@@ -41,7 +41,7 @@ Optional properties (all):
Example for I2C:
-i2c@12CA0000 {
+i2c@12ca0000 {
cros-ec@1e {
reg = <0x1e>;
compatible = "google,cros-ec-i2c";
diff --git a/dts/Bindings/mfd/mc13xxx.txt b/dts/Bindings/mfd/mc13xxx.txt
index ac235fe..8261ea7 100644
--- a/dts/Bindings/mfd/mc13xxx.txt
+++ b/dts/Bindings/mfd/mc13xxx.txt
@@ -130,7 +130,7 @@ ecspi@70010000 { /* ECSPI1 */
#size-cells = <0>;
led-control = <0x000 0x000 0x0e0 0x000>;
- sysled {
+ sysled@3 {
reg = <3>;
label = "system:red:live";
linux,default-trigger = "heartbeat";
diff --git a/dts/Bindings/mfd/syscon.txt b/dts/Bindings/mfd/syscon.txt
index 8b92d45..25d9e9c 100644
--- a/dts/Bindings/mfd/syscon.txt
+++ b/dts/Bindings/mfd/syscon.txt
@@ -16,9 +16,17 @@ Required properties:
Optional property:
- reg-io-width: the size (in bytes) of the IO accesses that should be
performed on the device.
+- hwlocks: reference to a phandle of a hardware spinlock provider node.
Examples:
gpr: iomuxc-gpr@20e0000 {
compatible = "fsl,imx6q-iomuxc-gpr", "syscon";
reg = <0x020e0000 0x38>;
+ hwlocks = <&hwlock1 1>;
+};
+
+hwlock1: hwspinlock@40500000 {
+ ...
+ reg = <0x40500000 0x1000>;
+ #hwlock-cells = <1>;
};