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| author | Sascha Hauer <s.hauer@pengutronix.de> | 2021-01-05 12:56:25 +0100 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2021-01-07 11:41:05 +0100 |
| commit | 6ea3de1b8ce7a0154233bd75e77e6e44a525d0ef (patch) | |
| tree | 5d16ca525c12dddb21d9c4750dfd1a1e354eb731 /dts/Bindings/mips | |
| parent | 93c4690b4921d3149db3fcf5b62a8aa5010a4ae7 (diff) | |
| download | barebox-6ea3de1b8ce7a0154233bd75e77e6e44a525d0ef.tar.gz barebox-6ea3de1b8ce7a0154233bd75e77e6e44a525d0ef.tar.xz | |
dts: update to v5.11-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings/mips')
| -rw-r--r-- | dts/Bindings/mips/mscc.txt | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/dts/Bindings/mips/mscc.txt b/dts/Bindings/mips/mscc.txt index bc817e9846..cc916eaeed 100644 --- a/dts/Bindings/mips/mscc.txt +++ b/dts/Bindings/mips/mscc.txt @@ -4,7 +4,7 @@ Boards with a SoC of the Microsemi MIPS family shall have the following properties: Required properties: -- compatible: "mscc,ocelot" +- compatible: "mscc,ocelot", "mscc,luton", "mscc,serval" or "mscc,jr2" * Other peripherals: |