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authorSascha Hauer <s.hauer@pengutronix.de>2018-09-11 08:26:30 +0200
committerSascha Hauer <s.hauer@pengutronix.de>2018-09-11 17:23:13 +0200
commit35f607bc7da71b302fd6bf3d6d48d7ea66df1195 (patch)
treedd2cf14c56430d21079c794fa6e03d7f5d91070e /dts/Bindings/mmc/sdhci-of-dwcmshc.txt
parent625eea2765d94aee016cf25d9cabecde8eae0775 (diff)
downloadbarebox-35f607bc7da71b302fd6bf3d6d48d7ea66df1195.tar.gz
dts: update to v4.19-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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+* Synopsys DesignWare Cores Mobile Storage Host Controller
+
+Required properties:
+- compatible: should be one of the following:
+ "snps,dwcmshc-sdhci"
+- reg: offset and length of the register set for the device.
+- interrupts: a single interrupt specifier.
+- clocks: Array of clocks required for SDHCI; requires at least one for
+ core clock.
+- clock-names: Array of names corresponding to clocks property; shall be
+ "core" for core clock and "bus" for optional bus clock.
+
+Example:
+ sdhci2: sdhci@aa0000 {
+ compatible = "snps,dwcmshc-sdhci";
+ reg = <0xaa0000 0x1000>;
+ interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&emmcclk>;
+ bus-width = <8>;
+ }