summaryrefslogtreecommitdiffstats
path: root/dts/Bindings/mmc
diff options
context:
space:
mode:
authorSascha Hauer <s.hauer@pengutronix.de>2016-06-13 07:31:46 +0200
committerSascha Hauer <s.hauer@pengutronix.de>2016-06-13 12:43:53 +0200
commit86186c232241b607f84cc266a6cda49160f44948 (patch)
tree286a87dae7f2d8c3eda5b8551fc9b5f4db726c45 /dts/Bindings/mmc
parent0cf29e11efa66ad4515c9391303406c725be2c7a (diff)
downloadbarebox-86186c232241b607f84cc266a6cda49160f44948.tar.gz
barebox-86186c232241b607f84cc266a6cda49160f44948.tar.xz
dts: update to v4.7-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings/mmc')
-rw-r--r--dts/Bindings/mmc/microchip,sdhci-pic32.txt2
-rw-r--r--dts/Bindings/mmc/mmc-pwrseq-emmc.txt2
-rw-r--r--dts/Bindings/mmc/rockchip-dw-mshc.txt1
-rw-r--r--dts/Bindings/mmc/sdhci-st.txt4
-rw-r--r--dts/Bindings/mmc/tmio_mmc.txt3
-rw-r--r--dts/Bindings/mmc/usdhi6rol0.txt6
6 files changed, 14 insertions, 4 deletions
diff --git a/dts/Bindings/mmc/microchip,sdhci-pic32.txt b/dts/Bindings/mmc/microchip,sdhci-pic32.txt
index 71ad57e050..3149297b39 100644
--- a/dts/Bindings/mmc/microchip,sdhci-pic32.txt
+++ b/dts/Bindings/mmc/microchip,sdhci-pic32.txt
@@ -20,7 +20,7 @@ Example:
compatible = "microchip,pic32mzda-sdhci";
reg = <0x1f8ec000 0x100>;
interrupts = <191 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&REFCLKO4>, <&PBCLK5>;
+ clocks = <&rootclk REF4CLK>, <&rootclk PB5CLK>;
clock-names = "base_clk", "sys_clk";
bus-width = <4>;
cap-sd-highspeed;
diff --git a/dts/Bindings/mmc/mmc-pwrseq-emmc.txt b/dts/Bindings/mmc/mmc-pwrseq-emmc.txt
index 0cb827bf94..3d965d57e0 100644
--- a/dts/Bindings/mmc/mmc-pwrseq-emmc.txt
+++ b/dts/Bindings/mmc/mmc-pwrseq-emmc.txt
@@ -1,7 +1,7 @@
* The simple eMMC hardware reset provider
The purpose of this driver is to perform standard eMMC hw reset
-procedure, as descibed by Jedec 4.4 specification. This procedure is
+procedure, as described by Jedec 4.4 specification. This procedure is
performed just after MMC core enabled power to the given mmc host (to
fix possible issues if bootloader has left eMMC card in initialized or
unknown state), and before performing complete system reboot (also in
diff --git a/dts/Bindings/mmc/rockchip-dw-mshc.txt b/dts/Bindings/mmc/rockchip-dw-mshc.txt
index ea5614b6f6..07184e8f89 100644
--- a/dts/Bindings/mmc/rockchip-dw-mshc.txt
+++ b/dts/Bindings/mmc/rockchip-dw-mshc.txt
@@ -15,6 +15,7 @@ Required Properties:
- "rockchip,rk3288-dw-mshc": for Rockchip RK3288
- "rockchip,rk3036-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip RK3036
- "rockchip,rk3368-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip RK3368
+ - "rockchip,rk3399-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip RK3399
Optional Properties:
* clocks: from common clock binding: if ciu_drive and ciu_sample are
diff --git a/dts/Bindings/mmc/sdhci-st.txt b/dts/Bindings/mmc/sdhci-st.txt
index 18d950df27..88faa91125 100644
--- a/dts/Bindings/mmc/sdhci-st.txt
+++ b/dts/Bindings/mmc/sdhci-st.txt
@@ -38,7 +38,7 @@ Optional properties:
- bus-width: Number of data lines.
See: Documentation/devicetree/bindings/mmc/mmc.txt.
-- max-frequency: Can be 200MHz, 100Mz or 50MHz (default) and used for
+- max-frequency: Can be 200MHz, 100Mz or 50MHz (default) and used for
configuring the CCONFIG3 in the mmcss.
See: Documentation/devicetree/bindings/mmc/mmc.txt.
@@ -48,7 +48,7 @@ Optional properties:
- vqmmc-supply: Phandle to the regulator dt node, mentioned as the vcc/vdd
supply in eMMC/SD specs.
-- sd-uhs--sdr50: To enable the SDR50 in the mmcss.
+- sd-uhs-sdr50: To enable the SDR50 in the mmcss.
See: Documentation/devicetree/bindings/mmc/mmc.txt.
- sd-uhs-sdr104: To enable the SDR104 in the mmcss.
diff --git a/dts/Bindings/mmc/tmio_mmc.txt b/dts/Bindings/mmc/tmio_mmc.txt
index 7fb746dd1a..0f610d4b5b 100644
--- a/dts/Bindings/mmc/tmio_mmc.txt
+++ b/dts/Bindings/mmc/tmio_mmc.txt
@@ -26,3 +26,6 @@ Required properties:
Optional properties:
- toshiba,mmc-wrprotect-disable: write-protect detection is unavailable
+- pinctrl-names: should be "default", "state_uhs"
+- pinctrl-0: should contain default/high speed pin ctrl
+- pinctrl-1: should contain uhs mode pin ctrl
diff --git a/dts/Bindings/mmc/usdhi6rol0.txt b/dts/Bindings/mmc/usdhi6rol0.txt
index 8babdaa862..6d1b7971d0 100644
--- a/dts/Bindings/mmc/usdhi6rol0.txt
+++ b/dts/Bindings/mmc/usdhi6rol0.txt
@@ -12,6 +12,12 @@ Optional properties:
- vmmc-supply: a phandle of a regulator, supplying Vcc to the card
- vqmmc-supply: a phandle of a regulator, supplying VccQ to the card
+- pinctrl-names: Can contain a "default" entry and a "state_uhs"
+ entry. The state_uhs entry is used together with the default
+ entry when the board requires distinct settings for UHS speeds.
+
+- pinctrl-N: One property for each name listed in pinctrl-names, see
+ ../pinctrl/pinctrl-bindings.txt.
Additionally any standard mmc bindings from mmc.txt can be used.