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authorSascha Hauer <s.hauer@pengutronix.de>2020-09-21 14:08:19 +0200
committerSascha Hauer <s.hauer@pengutronix.de>2020-09-21 14:08:19 +0200
commiteab18ebe074ddcf7d453dc3cd23d41c57ad8d0d7 (patch)
treeee55ce5b38fc56afdc16543e44ea4ea3798d5786 /dts/Bindings/mmc
parent79af54dfcb83ebd6d73a276a20d469716151868f (diff)
downloadbarebox-eab18ebe074ddcf7d453dc3cd23d41c57ad8d0d7.tar.gz
barebox-eab18ebe074ddcf7d453dc3cd23d41c57ad8d0d7.tar.xz
dts: update to v5.9-rc4
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings/mmc')
-rw-r--r--dts/Bindings/mmc/arasan,sdhci.yaml10
-rw-r--r--dts/Bindings/mmc/mtk-sd.txt2
-rw-r--r--dts/Bindings/mmc/nvidia,tegra20-sdhci.txt32
3 files changed, 38 insertions, 6 deletions
diff --git a/dts/Bindings/mmc/arasan,sdhci.yaml b/dts/Bindings/mmc/arasan,sdhci.yaml
index 5887c917d4..58fe9d02a7 100644
--- a/dts/Bindings/mmc/arasan,sdhci.yaml
+++ b/dts/Bindings/mmc/arasan,sdhci.yaml
@@ -30,9 +30,13 @@ allOf:
then:
properties:
clock-output-names:
- items:
- - const: clk_out_sd0
- - const: clk_in_sd0
+ oneOf:
+ - items:
+ - const: clk_out_sd0
+ - const: clk_in_sd0
+ - items:
+ - const: clk_out_sd1
+ - const: clk_in_sd1
properties:
compatible:
diff --git a/dts/Bindings/mmc/mtk-sd.txt b/dts/Bindings/mmc/mtk-sd.txt
index 0c9cf6a880..26a8f320a1 100644
--- a/dts/Bindings/mmc/mtk-sd.txt
+++ b/dts/Bindings/mmc/mtk-sd.txt
@@ -50,6 +50,8 @@ Optional properties:
error caused by stop clock(fifo full)
Valid range = [0:0x7]. if not present, default value is 0.
applied to compatible "mediatek,mt2701-mmc".
+- resets: Phandle and reset specifier pair to softreset line of MSDC IP.
+- reset-names: Should be "hrst".
Examples:
mmc0: mmc@11230000 {
diff --git a/dts/Bindings/mmc/nvidia,tegra20-sdhci.txt b/dts/Bindings/mmc/nvidia,tegra20-sdhci.txt
index 2cf3affa1b..96c0b1440c 100644
--- a/dts/Bindings/mmc/nvidia,tegra20-sdhci.txt
+++ b/dts/Bindings/mmc/nvidia,tegra20-sdhci.txt
@@ -15,8 +15,15 @@ Required properties:
- "nvidia,tegra210-sdhci": for Tegra210
- "nvidia,tegra186-sdhci": for Tegra186
- "nvidia,tegra194-sdhci": for Tegra194
-- clocks : Must contain one entry, for the module clock.
- See ../clocks/clock-bindings.txt for details.
+- clocks: For Tegra210, Tegra186 and Tegra194 must contain two entries.
+ One for the module clock and one for the timeout clock.
+ For all other Tegra devices, must contain a single entry for
+ the module clock. See ../clocks/clock-bindings.txt for details.
+- clock-names: For Tegra210, Tegra186 and Tegra194 must contain the
+ strings 'sdhci' and 'tmclk' to represent the module and
+ the timeout clocks, respectively.
+ For all other Tegra devices must contain the string 'sdhci'
+ to represent the module clock.
- resets : Must contain an entry for each entry in reset-names.
See ../reset/reset.txt for details.
- reset-names : Must include the following entries:
@@ -99,7 +106,7 @@ Optional properties for Tegra210, Tegra186 and Tegra194:
Example:
sdhci@700b0000 {
- compatible = "nvidia,tegra210-sdhci", "nvidia,tegra124-sdhci";
+ compatible = "nvidia,tegra124-sdhci";
reg = <0x0 0x700b0000 0x0 0x200>;
interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA210_CLK_SDMMC1>;
@@ -115,3 +122,22 @@ sdhci@700b0000 {
nvidia,pad-autocal-pull-down-offset-1v8 = <0x7b>;
status = "disabled";
};
+
+sdhci@700b0000 {
+ compatible = "nvidia,tegra210-sdhci";
+ reg = <0x0 0x700b0000 0x0 0x200>;
+ interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&tegra_car TEGRA210_CLK_SDMMC1>,
+ <&tegra_car TEGRA210_CLK_SDMMC_LEGACY>;
+ clock-names = "sdhci", "tmclk";
+ resets = <&tegra_car 14>;
+ reset-names = "sdhci";
+ pinctrl-names = "sdmmc-3v3", "sdmmc-1v8";
+ pinctrl-0 = <&sdmmc1_3v3>;
+ pinctrl-1 = <&sdmmc1_1v8>;
+ nvidia,pad-autocal-pull-up-offset-3v3 = <0x00>;
+ nvidia,pad-autocal-pull-down-offset-3v3 = <0x7d>;
+ nvidia,pad-autocal-pull-up-offset-1v8 = <0x7b>;
+ nvidia,pad-autocal-pull-down-offset-1v8 = <0x7b>;
+ status = "disabled";
+};