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author | Sascha Hauer <s.hauer@pengutronix.de> | 2014-04-25 11:22:32 +0200 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2014-04-28 09:08:46 +0200 |
commit | 00ce25c6dcdae5582ae4be37147ab33678adc995 (patch) | |
tree | 41c93102ae304a61738c31353e3cb5336ef0b297 /dts/Bindings/net/cpsw-phy-sel.txt | |
parent | 0af79fbb6779921d3f1962773adb7fb57d3c89d4 (diff) | |
download | barebox-00ce25c6dcdae5582ae4be37147ab33678adc995.tar.gz barebox-00ce25c6dcdae5582ae4be37147ab33678adc995.tar.xz |
Add devicetree source files as of Linux-3.15-rc2
This adds the Linux dts files to barebox. The dts files are
generated from Ian Campbells device-tree-rebasing.git:
git://xenbits.xen.org/people/ianc/device-tree-rebasing.git
The dts are found in dts/ in the barebox repository and
will be updated from upstream regularly, probably for each upstream
-rc.
To keep the synchronization with upstream easy no changes to
the original files are allowed under dts/. Instead changes to
upstream dts files will be done using overlays in arch/$ARCH/dts/.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings/net/cpsw-phy-sel.txt')
-rw-r--r-- | dts/Bindings/net/cpsw-phy-sel.txt | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/dts/Bindings/net/cpsw-phy-sel.txt b/dts/Bindings/net/cpsw-phy-sel.txt new file mode 100644 index 0000000000..7ff57a119f --- /dev/null +++ b/dts/Bindings/net/cpsw-phy-sel.txt @@ -0,0 +1,28 @@ +TI CPSW Phy mode Selection Device Tree Bindings +----------------------------------------------- + +Required properties: +- compatible : Should be "ti,am3352-cpsw-phy-sel" +- reg : physical base address and size of the cpsw + registers map +- reg-names : names of the register map given in "reg" node + +Optional properties: +-rmii-clock-ext : If present, the driver will configure the RMII + interface to external clock usage + +Examples: + + phy_sel: cpsw-phy-sel@44e10650 { + compatible = "ti,am3352-cpsw-phy-sel"; + reg= <0x44e10650 0x4>; + reg-names = "gmii-sel"; + }; + +(or) + phy_sel: cpsw-phy-sel@44e10650 { + compatible = "ti,am3352-cpsw-phy-sel"; + reg= <0x44e10650 0x4>; + reg-names = "gmii-sel"; + rmii-clock-ext; + }; |