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| author | Sascha Hauer <s.hauer@pengutronix.de> | 2021-12-13 23:28:49 +0100 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2021-12-13 23:28:49 +0100 |
| commit | 70507542d7cf38e689bc9f171080d681322af780 (patch) | |
| tree | 0bcb30c8ea9c7181eef655c26159230598beb4b7 /dts/Bindings/net | |
| parent | cda35874a87a89a211145e94488e2414d47d1704 (diff) | |
| download | barebox-70507542d7cf38e689bc9f171080d681322af780.tar.gz barebox-70507542d7cf38e689bc9f171080d681322af780.tar.xz | |
dts: update to v5.16-rc5
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings/net')
| -rw-r--r-- | dts/Bindings/net/ethernet-phy.yaml | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/dts/Bindings/net/ethernet-phy.yaml b/dts/Bindings/net/ethernet-phy.yaml index 2766fe45bb..ee42328a10 100644 --- a/dts/Bindings/net/ethernet-phy.yaml +++ b/dts/Bindings/net/ethernet-phy.yaml @@ -91,6 +91,14 @@ properties: compensate for the board being designed with the lanes swapped. + enet-phy-lane-no-swap: + $ref: /schemas/types.yaml#/definitions/flag + description: + If set, indicates that PHY will disable swap of the + TX/RX lanes. This property allows the PHY to work correcly after + e.g. wrong bootstrap configuration caused by issues in PCB + layout design. + eee-broken-100tx: $ref: /schemas/types.yaml#/definitions/flag description: |